Implementation of Time-interleaved Non-binary Noise-shaping SAR ADCs

본 논문에서는 Time-interleaved (TI) noise-shaping (NS) successive approximation register (SAR) analog-to-digital converter (ADC)의 동작속도와 해상도의 최적화에 대해 논의한다. 특별히 non-binary 구조에서 Integration stage의 gain의 변화를 통해 ADC 전체의 해상도, 동작 속도를 최적화 성능검증 결과를 소개한다.

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Publication Details

Journal
Journal of the Institute of Electronics and Information Engineers
Published
2025-12-31
DOI
https://doi.org/10.5573/ieie.2025.62.12.58
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
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article

Implementation of Time-interleaved Non-binary Noise-shaping SAR ADCs

Dong-Jin Chang
Journal of the Institute of Electronics and Information Engineers
Analog and Mixed-Signal Circuit Design
article

Implementation of Time-interleaved Non-binary Noise-shaping SAR ADCs

Dong-Jin Chang
article en

Abstract

본 논문에서는 Time-interleaved (TI) noise-shaping (NS) successive approximation register (SAR) analog-to-digital converter (ADC)의 동작속도와 해상도의 최적화에 대해 논의한다. 특별히 non-binary 구조에서 Integration stage의 gain의 변화를 통해 ADC 전체의 해상도, 동작 속도를 최적화 성능검증 결과를 소개한다.

Journal of the Institute of Electronics and Information EngineersVol. 62(12)
Openalex Percentile: Top 38%
Analog and Mixed-Signal Circuit Design
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Implementation of Time-interleaved Non-binary Noise-shaping SAR ADCs — Dong-Jin Chang · Journal of the Institute of Electronics and Information Engineers (2025) | TGRS Research Map | TGRS