HACE: HLS-Tool-Agnostic CDFG Extraction from RTL Designs

High-Level Synthesis (HLS) compilers translate programs written in high-level languages (e.g., C/C++) into hardware by scheduling control-data flow graph (CDFG) operations. While the CDFG is central to scheduling, it is often inaccessible---either hidden by closed-source tools or impossible to export from open-source tools. Having access to such a high-level representation is highly beneficial: it provides a consistent basis for comparing scheduling strategies across different HLS tools. To address this gap, we introduce HACE, an HLS tool-agnostic framework that reconstructs the CDFG from HLS-generated circuits. HACE's extracted CDFGs can serve as a common ground for fair evaluation of different schedulers. We demonstrate HACE on RTL designs produced by commercial and open-source HLS compilers, and show how it facilitates cross-HLS-tool comparisons. HACE is open-sourced at https://github.com/ETHZ-DYNAMO/hace, offering a practical foundation for research and experimentation with diverse HLS flows.