EagerlyElastic: Correct-by-Construction Eager Execution in Dynamically-Scheduled HLS

Circuits generated through dynamically-scheduled high-level synthesis (also known as elastic circuits) are highly performant, as circuit execution can adjust at runtime to variable control flow or memory dependencies. While there are many promising opportunities for further optimization, the resulting circuits can be difficult to analyze—the challenge of maintaining circuit correctness forms a major obstacle to the optimization process. Seeking to increase performance, we introduce for the first time eager execution—speculatively executing both sides of a conditional branch in parallel, with results committed based on the branch condition—to elastic circuits. We build on recent work to present eager execution as a set of formally verified circuit rewrite patterns, localized transformations which we prove preserve correctness. This allows us to pursue high performance, while simultaneously guaranteeing that global circuit correctness is maintained at every stage. Our eager execution strongly increases performance using only slight alterations to the control path of the circuit: unlike the prohibitive resource cost of processor eager execution, elastic-circuit eager execution can be effectively enabled without additional computational units. On a set of selected kernels, we achieve an average speed-up of 3.2x, at an average increase of 1.2x in LUTs and 1.3x in FFs, compared to standard elastic circuits. Excitingly, elastic eager execution opens up a new design space of high-performance circuits, generated through correct-by-construction approaches, which we have only just begun to explore. EagerlyElastic is open-sourced under 10.5281/zenodo.17703725.

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Published
2026-02-05
DOI
https://doi.org/10.1145/3748173.3779196
Primary Topic
Embedded Systems Design Techniques
Type
article
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article

EagerlyElastic: Correct-by-Construction Eager Execution in Dynamically-Scheduled HLS

Shun Katsumi, Emmet Murphy, Lana Josipovic
Embedded Systems Design Techniques
article

EagerlyElastic: Correct-by-Construction Eager Execution in Dynamically-Scheduled HLS

Shun Katsumi, Emmet Murphy, Lana Josipovic
article en

Abstract

Circuits generated through dynamically-scheduled high-level synthesis (also known as elastic circuits) are highly performant, as circuit execution can adjust at runtime to variable control flow or memory dependencies. While there are many promising opportunities for further optimization, the resulting circuits can be difficult to analyze—the challenge of maintaining circuit correctness forms a major obstacle to the optimization process. Seeking to increase performance, we introduce for the first time eager execution—speculatively executing both sides of a conditional branch in parallel, with results committed based on the branch condition—to elastic circuits. We build on recent work to present eager execution as a set of formally verified circuit rewrite patterns, localized transformations which we prove preserve correctness. This allows us to pursue high performance, while simultaneously guaranteeing that global circuit correctness is maintained at every stage. Our eager execution strongly increases performance using only slight alterations to the control path of the circuit: unlike the prohibitive resource cost of processor eager execution, elastic-circuit eager execution can be effectively enabled without additional computational units. On a set of selected kernels, we achieve an average speed-up of 3.2x, at an average increase of 1.2x in LUTs and 1.3x in FFs, compared to standard elastic circuits. Excitingly, elastic eager execution opens up a new design space of high-performance circuits, generated through correct-by-construction approaches, which we have only just begun to explore. EagerlyElastic is open-sourced under 10.5281/zenodo.17703725.

ETH Zurich (CH)
Openalex Percentile: Top 77%
Embedded Systems Design Techniques
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