Fast and accurate identification of hardware Trojan locations in gate-level netlist using nearest neighbour approach integrated with machine learning technique

Ensuring the security of integrated circuits (ICs) requires reliable detection and precise localization of Hardware Trojans (HTs), which remain challenging due to increasing design complexity and lack of golden references. This paper introduces a machine learning framework that integrates graph-based modeling, Graph Neural Networks (GNNs), and nearest neighbour (NN) enhancement for fast and accurate HT detection at the gate-level netlist without relying on the golden reference. Three different machine learning models are employed in the present work. Case-I uses a decision tree classifier with Principal Component Analysis (PCA) for binary detection of Trojan presence, as a reference model. The decision tree based machine learning model is initially validated against the formal verification method. The decision tree model is only able to identify HT presence without localizing the locations of HT in the circuit. Case-II uses a GNN-based graph-to-graph classification, distinguishing clean netlists from the infected one at sub-graph level (coarse grained). The model is able to map the infected sub-graphs back to the initial netlist circuit for the pinpointing of HTs at sub-graph level. Case-III uses a further simplified model with GNN-based node classification, enabling fine-grained localization of compromised gates in the circuit using only nodes. This model is ideal for pinpointing the exact Trojan locations within large-scale circuits. Subsequently, NN based concept is embedded with GNN models for further enhancing the detection accuracy of Case-II (accuracy improved from 62.8% to 97.7%) and Case-III (accuracy improved from 79.8% to 97.7%). Also, the scalability of the proposed approaches across diverse Trojan types, including combinational, sequential, and state-triggered attacks are validated by experiments carried on Trust-Hub benchmarks and Yosys-generated datasets. Comparative evaluation with state-of-the-art methods demonstrates superior performance, achieving 98.5% precision, 99.1% recall, and 96.7% F1-score, while maintaining computational efficiency. By combining graph structural learning with NN-based contextual refinement, the proposed work delivers a high-performance, architecture-agnostic solution for detecting and localizing hardware Trojans in modern ICs as tested against unknown designs.

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Publication Details

Journal
Discover Electronics
Published
2026-02-03
DOI
https://doi.org/10.1007/s44291-025-00151-1
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
Type
article
Field-Weighted Citation Impact
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article

Fast and accurate identification of hardware Trojan locations in gate-level netlist using nearest neighbour approach integrated with machine learning technique

Vijay Kumar Sutrakar, Siddharth Bisariya, Anindita Chattopadhyay
Discover Electronics
Physical Unclonable Functions (PUFs) and Hardware Security
article

Fast and accurate identification of hardware Trojan locations in gate-level netlist using nearest neighbour approach integrated with machine learning technique

Vijay Kumar Sutrakar, Siddharth Bisariya, Anindita Chattopadhyay
article en

Abstract

Ensuring the security of integrated circuits (ICs) requires reliable detection and precise localization of Hardware Trojans (HTs), which remain challenging due to increasing design complexity and lack of golden references. This paper introduces a machine learning framework that integrates graph-based modeling, Graph Neural Networks (GNNs), and nearest neighbour (NN) enhancement for fast and accurate HT detection at the gate-level netlist without relying on the golden reference. Three different machine learning models are employed in the present work. Case-I uses a decision tree classifier with Principal Component Analysis (PCA) for binary detection of Trojan presence, as a reference model. The decision tree based machine learning model is initially validated against the formal verification method. The decision tree model is only able to identify HT presence without localizing the locations of HT in the circuit. Case-II uses a GNN-based graph-to-graph classification, distinguishing clean netlists from the infected one at sub-graph level (coarse grained). The model is able to map the infected sub-graphs back to the initial netlist circuit for the pinpointing of HTs at sub-graph level. Case-III uses a further simplified model with GNN-based node classification, enabling fine-grained localization of compromised gates in the circuit using only nodes. This model is ideal for pinpointing the exact Trojan locations within large-scale circuits. Subsequently, NN based concept is embedded with GNN models for further enhancing the detection accuracy of Case-II (accuracy improved from 62.8% to 97.7%) and Case-III (accuracy improved from 79.8% to 97.7%). Also, the scalability of the proposed approaches across diverse Trojan types, including combinational, sequential, and state-triggered attacks are validated by experiments carried on Trust-Hub benchmarks and Yosys-generated datasets. Comparative evaluation with state-of-the-art methods demonstrates superior performance, achieving 98.5% precision, 99.1% recall, and 96.7% F1-score, while maintaining computational efficiency. By combining graph structural learning with NN-based contextual refinement, the proposed work delivers a high-performance, architecture-agnostic solution for detecting and localizing hardware Trojans in modern ICs as tested against unknown designs.

Discover ElectronicsVol. 3(1)
Aeronautical Development Establishment (IN), Bangalore Medical College and Research Institute (IN)
Industry, innovation and infrastructure
Openalex Percentile: Top 79%
Physical Unclonable Functions (PUFs) and Hardware Security
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