Interface dipole modulation for gate dielectrics in Field-Effect transistors: a review

Abstract Interface dipole engineering has recently become a key technology in the fabrication of semiconductor FETs. This review comprehensively covers the principles, methods, and applications of interface dipoles in gate dielectric structures. We discuss the evolution from traditional SiO 2 /poly-Si structures to high-K/metal gate structures, and emphasize the influence of interface dipoles on device electrical characteristics. We examine the mechanisms for interface dipole formation in terms of electronegativity differences, charge transfer, and structural considerations, comparing and reviewing several models. We also cover implementation methods such as layers, interfaces, and positions for forming dipoles, and compare the effects of various combinations. This technology enables device implementation, which has become challenging due to CMOS scaling limitations. This review also discusses the applicability in new device platforms such as two-dimensional material semiconductors and ferroelectric FETs. We review current challenges and future research directions and emphasize the increasing importance of this technology in next-generation semiconductor development. This comprehensive review provides valuable insights from materials science and semiconductor device engineering perspectives.

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Publication Details

Journal
Journal of the Korean Ceramic Society
Published
2026-02-03
DOI
https://doi.org/10.1007/s43207-026-00587-5
Primary Topic
Ferroelectric and Negative Capacitance Devices
Type
article
Field-Weighted Citation Impact
0.00

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article

Interface dipole modulation for gate dielectrics in Field-Effect transistors: a review

Hyojung Kim, Ho Won Jang, Wangseop Lim
Journal of the Korean Ceramic Society
Ferroelectric and Negative Capacitance Devices
article

Interface dipole modulation for gate dielectrics in Field-Effect transistors: a review

Hyojung Kim, Ho Won Jang, Wangseop Lim
article en

Abstract

Abstract Interface dipole engineering has recently become a key technology in the fabrication of semiconductor FETs. This review comprehensively covers the principles, methods, and applications of interface dipoles in gate dielectric structures. We discuss the evolution from traditional SiO 2 /poly-Si structures to high-K/metal gate structures, and emphasize the influence of interface dipoles on device electrical characteristics. We examine the mechanisms for interface dipole formation in terms of electronegativity differences, charge transfer, and structural considerations, comparing and reviewing several models. We also cover implementation methods such as layers, interfaces, and positions for forming dipoles, and compare the effects of various combinations. This technology enables device implementation, which has become challenging due to CMOS scaling limitations. This review also discusses the applicability in new device platforms such as two-dimensional material semiconductors and ferroelectric FETs. We review current challenges and future research directions and emphasize the increasing importance of this technology in next-generation semiconductor development. This comprehensive review provides valuable insights from materials science and semiconductor device engineering perspectives.

Journal of the Korean Ceramic Society
Seoul National University (KR), Sejong University (KR), Advanced Institute of Convergence Technology (KR)
National Research Foundation, Seoul National University, National Research Foundation of Korea, Ministry of Science and ICT, South Korea, Institute of Engineering Research, Seoul National University
Industry, innovation and infrastructure
Openalex Percentile: Top 68%
Ferroelectric and Negative Capacitance Devices
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