FPGA-RICH: A low-latency, high-throughput online partial particle identification system for the NA62 experiment

FPGA-RICH is an FPGA-based online partial particle identification system for the NA62 experiment utilizing Artificial Intelligence (AI) techniques. Integrated between the readout of the Ring Imaging Cherenkov detector (RICH) and the low-level trigger processor (L0TP+), FPGA-RICH implements a fast pipeline to process in real-time the RICH raw hit data stream, producing trigger-primitives containing elaborate physics information, such as the number of charged particles in a physics event, that L0TP+ can use to improve trigger decision selectivity. An AI algorithm provides classification of events by the number of charged particles (Nr) with efficiency 83% and purity 85% averaged over four Nr classes (0, 1, 2, >=3). The full pipeline throughput has been estimated to be above 9.375 MHz using synthetic data, and the system has been integrated in parasitic mode at NA62 to complete validation at the full experiment event rate of 10 MHz.