Cesium-adsorbed nanometer-thick TiO2 channel thin-film transistors for enhanced drain currents

Cesium adsorption on a TiO2 channel in a thin-film transistor (TFT) is examined to improve channel conductivity. The TFT consists of a 16 nm-thick anatase TiO2 channel, Ti source and drain electrodes, and an SiO2 gate capacitor. The gate width and length are 1 mm and 60 μm, respectively. The cesium adsorption is performed by immersing the TFT in a CsCl solution. Before immersion, the TiO2 channel is covered with periodically stacked layers of aluminum silicate and SiO2, which effectively adsorb cesium ions in the CsCl solution. We also assume that the Cs absorbed multiple layers act as a Cs diffusion source to the TiO2 channel layer. The doping of Cs is investigated by x-ray photoelectron spectroscopy. The pristine TFT without the Cs adsorption exhibits a carrier mobility of ∼0.54 cm2/V s with drain currents around 30 μA and a gate voltage of 20 V. After the immersion of the TFT in a 0.1mM CsCl solution, the drain current increases to the milliampere range. An equivalent-circuit model and COMSOL-device simulator suggest enhanced effective mobilities exceeding ∼90 cm2/V s. These results suggest that Cs diffuses into the TiO2 channel and suppresses oxygen-vacancy traps, thereby leading to the high electron mobility. The operation mechanism of the Cs-adsorbed TiO2 TFT and its applicability are discussed in this paper.