Machine Learning-Based Performance Optimization of Copper–Graphene Heterointerconnects
This work introduces a model-based optimization approach for on-chip copper-graphene interconnects. The aim of this study is to optimize the signal integrity (SI) characteristics of these nano interconnects. Employing existing optimization techniques to improve the SI performance of advanced technology node copper-graphene interconnects remains challenging due to prohibitive computational costs as these interconnects require precise characterization through computationally exhaustive full-wave simulations. Our current work proposes a flexible and efficient modeling and optimization framework that improves SI compared to electromagnetic (EM) simulations using advanced, data-intensive optimization algorithms such as Genetic Algorithm (GA) and Pattern Search. We use the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Gamultiobjective</i> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Paretosearch</i> algorithms to demonstrate the capabilities of the proposed framework and verify the accuracy of results in both single- and multiobjective scenarios with the help of two numerical examples.
Authors
- Suyash Kushwaha (ORCID: https://orcid.org/0009-0007-6339-996X)
- Domenico Spina (ORCID: https://orcid.org/0000-0003-2379-5259)
- Rohit Sharma (ORCID: https://orcid.org/0000-0002-8633-4890)
- Sourajeet Roy
Institutions
- Indian Institute of Technology Ropar (IN)
- Vrije Universiteit Brussel (BE)
- Indian Institute of Technology Roorkee (IN)
Publication Details
- Journal
- IEEE Transactions on Components Packaging and Manufacturing Technology
- Published
- 2026-01-28
- DOI
- https://doi.org/10.1109/tcpmt.2026.3658703
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.00