Advances in Vertical Wire Bonding for Through Mold Interconnect and Fan Out Wafer Level Packages

Next generation package design requirements continue to drive the development of advanced assembly equipment and process technologies that increase I/O density and performance while reducing package thickness and cost. Despite recent advances in 2.5D and 3D packaging technology, wire bonding remains the most commonly used interconnect process due to its low cost and flexibility. Over a decade ago, wire bonding packaging cost decreased significantly with the introduction of copper wire bonding solutions. Since then, productivity improvements and advanced process capabilities have maintained wire bonding as the preferred interconnect technology. This paper explores new developments in Vertical Wire Bonding process technology, which is now under evaluation to replace existing advanced packaging processes including TSV and Cu Pillar. Vertical Wire Bonding is already used in high volume production for electromagnetic interference (EMI) shielding in RF packages. Focus is now shifting towards qualifying Vertical Wire Bonding in various through mold interconnect and vertically stacked fan-out wafer level packages. Vertical Wire Bonding capabilities and design rules are presented and alternative packaging process flows and cost are compared.

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Publication Details

Journal
IMAPSource Proceedings
Published
2025-11-19
DOI
https://doi.org/10.4071/001c.151186
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.00
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article

Advances in Vertical Wire Bonding for Through Mold Interconnect and Fan Out Wafer Level Packages

John Foley, Daniel Tan
IMAPSource Proceedings
3D IC and TSV technologies
article

Advances in Vertical Wire Bonding for Through Mold Interconnect and Fan Out Wafer Level Packages

John Foley, Daniel Tan
article en

Abstract

Next generation package design requirements continue to drive the development of advanced assembly equipment and process technologies that increase I/O density and performance while reducing package thickness and cost. Despite recent advances in 2.5D and 3D packaging technology, wire bonding remains the most commonly used interconnect process due to its low cost and flexibility. Over a decade ago, wire bonding packaging cost decreased significantly with the introduction of copper wire bonding solutions. Since then, productivity improvements and advanced process capabilities have maintained wire bonding as the preferred interconnect technology. This paper explores new developments in Vertical Wire Bonding process technology, which is now under evaluation to replace existing advanced packaging processes including TSV and Cu Pillar. Vertical Wire Bonding is already used in high volume production for electromagnetic interference (EMI) shielding in RF packages. Focus is now shifting towards qualifying Vertical Wire Bonding in various through mold interconnect and vertically stacked fan-out wafer level packages. Vertical Wire Bonding capabilities and design rules are presented and alternative packaging process flows and cost are compared.

IMAPSource ProceedingsVol. 2025(DPC)
Kulicke & Soffa (United States) (US)
Industry, innovation and infrastructure
Openalex Percentile: Top 38%
3D IC and TSV technologies
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Advances in Vertical Wire Bonding for Through Mold Interconnect and Fan Out Wafer Level Packages — John Foley, Daniel Tan · IMAPSource Proceedings (2025) | TGRS Research Map | TGRS