RRAM Variability Harvesting for CIM‐Integrated TRNG

ABSTRACT True random number generators (TRNGs) are essential for hardware security in edge AI systems, yet conventional designs often incur large analog overhead and limited throughput imposed by standalone macros. We present a Compute‐in‐Memory (CiM)‐compatible TRNG that directly exploits the intrinsic stochasticity of TaO x ‐based 1T1R RRAM arrays, enabling entropy extraction within the memory fabric. Bit‐rate is scaled by parallel column readout circuits consisting of a transimpedance amplifier (TIA) and an ADC. Our design achieves up to ∼270 Mbps throughput with TIA + 16‐bit ADC per column. Furthermore, a lightweight shift‐XOR post‐processing stage permits reduction to 8‐bit ADC resolution, lowering energy consumption to ∼51 pJ bit −1 without degrading randomness quality. Fully compatible with standard CiM read paths, the architecture introduces minimal hardware overhead and provides a scalable and energy‐efficient foundation for secure random number generation in edge‐AI applications.