PDEPE: CMOS Implementation of Power and Delay Efficient Polar Encoder for Modern Communication Systems

Polar codes are straightforward and effective channel codes for discrete memoryless channels with binary input. Due to its low encoding and decoding complexity, polar code has been embraced by the 5th Generation (5G) wireless communication systems as a channel coding scheme for control channels. In this paper, a low-power and fast polar encoder, namely, Power and Delay Efficient Polar Encoder (PDEPE), has been designed and implemented using 22nm CMOS technology. In this work, three fundamental parameters are considered to analyze the suggested design: supply voltage VDD, aspect ratio of NMOS transistor W/L, and the transconductance KPN. The suggested PDEPE design has been enhanced using a proposed optimization approach based on common sub-expression elimination methods. According to the synthesis results, the power delay product (PDP) of the proposed design is improved by 54, 40, and 44% respectively, with respect to VDD, (W/L), and KPN compared to related designs. The proposed design consumes less power and is faster than the conventional polar (8, 4) encoder. The proposed design is more suitable for modern communication systems like 5G.