Circuit Model for Hysteresis Losses in Twisted Stacked HTS Cables

The twisted stacked tape cable (TSTC) configuration, which employs high-temperature superconducting (HTS) tapes, is among the most promising conductor designs for fusion applications, particularly in Tokamak reactors. This study proposes an alternative approach to finite element method (FEM) models to analyze such a realistic TSTC geometry while significantly reducing the computational cost of conventional 3D finite element method (FEM) modeling. The analysis is performed using CALYPSO, a non-linear 3D circuit model originally developed for the study of no-insulation HTS (NI-HTS) coils. In this work, CALYPSO is applied to investigate the electromagnetic behavior of a twisted stack of superconducting tapes over one twist pitch. In this configuration, the stack of HTS tapes is twisted around the cable axis, rather than its own. The model provides a detailed representation of the stack geometry, capturing both the current distribution within individual tapes and the coupling currents between them. The results obtained from CALYPSO, in terms of instantaneous power losses, are benchmarked with numerical simulations based on alternative modeling approaches.