C compiler porting and optimization for the 32-Bit Loong Arch CPU

The LoongArch instruction set architecture (ISA) has become a cornerstone in efforts to build a secure, autonomous, and high-performance domestic computing ecosystem. To make Loongson processors practical for real software deployment, a dependable and well-optimized compiler is essential—particularly for emerging 32-bit platforms such as LoongArch32R. This study develops a complete and reproducible workflow for adapting and optimizing the GNU C Compiler (GCC) for LoongArch32R, enabling reliable instruction generation and performance-focused code transformation. The work combines several technical components: validation of the GCC backend, execution through QEMU in both user-level and system-level environments, incorporation of the MOS teaching operating system with custom benchmark applications, detailed examination of LSX SIMD auto-vectorization, and the introduction of a prototype custom vector instruction (VCUBE.W) through assembler-level extension. A structured benchmarking suite—including matrix multiplication, prime sieve, STREAM-like memory workloads, and memory operations—was implemented to evaluate optimization levels and compiler behavior. Performance measurements were analyzed and visualized using Python-based graphing tools. The experimental results show clear runtime improvements from standard optimization flags and demonstrate partial vectorization benefits, verifying that the ported compiler is functional, stable, and capable of generating efficient LoongArch32R code. Overall, the framework produced in this work offers a practical foundation for future compiler development, educational use, and broader software ecosystem support for LoongArch-based systems.

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2025-12-31
DOI
https://doi.org/10.5281/zenodo.18324912
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
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article

C compiler porting and optimization for the 32-Bit Loong Arch CPU

Shi Huibin, Md Shahariar Idris Robin, Jannatul Mawa Mahin
Zenodo (CERN European Organization for Nuclear Research)
Parallel Computing and Optimization Techniques
article

C compiler porting and optimization for the 32-Bit Loong Arch CPU

Shi Huibin, Md Shahariar Idris Robin, Jannatul Mawa Mahin
article en

Abstract

The LoongArch instruction set architecture (ISA) has become a cornerstone in efforts to build a secure, autonomous, and high-performance domestic computing ecosystem. To make Loongson processors practical for real software deployment, a dependable and well-optimized compiler is essential—particularly for emerging 32-bit platforms such as LoongArch32R. This study develops a complete and reproducible workflow for adapting and optimizing the GNU C Compiler (GCC) for LoongArch32R, enabling reliable instruction generation and performance-focused code transformation. The work combines several technical components: validation of the GCC backend, execution through QEMU in both user-level and system-level environments, incorporation of the MOS teaching operating system with custom benchmark applications, detailed examination of LSX SIMD auto-vectorization, and the introduction of a prototype custom vector instruction (VCUBE.W) through assembler-level extension. A structured benchmarking suite—including matrix multiplication, prime sieve, STREAM-like memory workloads, and memory operations—was implemented to evaluate optimization levels and compiler behavior. Performance measurements were analyzed and visualized using Python-based graphing tools. The experimental results show clear runtime improvements from standard optimization flags and demonstrate partial vectorization benefits, verifying that the ported compiler is functional, stable, and capable of generating efficient LoongArch32R code. Overall, the framework produced in this work offers a practical foundation for future compiler development, educational use, and broader software ecosystem support for LoongArch-based systems.

Zenodo (CERN European Organization for Nuclear Research)
Nanjing University of Aeronautics and Astronautics (CN)
Openalex Percentile: Top 27%
Parallel Computing and Optimization Techniques
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