High-throughput DPDK-based framework for real-time applications in Elettra 2.0

The Data Plane Development Kit (DPDK) is a framework that enhances real-time communications by providing direct, high-speed access to network interfaces. This architecture centralizes acquisition and control in an HPC cluster, ensuring ultra-fast in-memory updates of all critical data, making it a viable choice for real-time feedback and machine control in particle accelerators. This approach was chosen for Elettra 2.0 to enable pre-mortem beam dump mitigation, more detailed post-mortem inspection, advanced correlation analysis and the implementation of complex control schemes. Time-sensitive applications implemented in C code interact with Beam Position Monitors (BPM), Low-Level RF (LLRF), Beam Loss Monitors (BLM) and Magnetic Power Converters through simple memory read and write operations at megahertz rates, making the system competitive with high-level processing applications based on FPGA architectures. This paper presents the system under test at Elettra, highlighting its architecture, performance, and integration, while demonstrating the successful implementation of Fast Orbit Feedback in parallel with turn-by-turn (TbT) data acquisition from twelve BPMs and an LLRF system.

Authors

Publication Details

Journal
JACOW
Published
2026-01-20
DOI
https://doi.org/10.18429/jacow-ibic2025-tuai01
Primary Topic
Particle Accelerators and Free-Electron Lasers
Type
article
Field-Weighted Citation Impact
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article

High-throughput DPDK-based framework for real-time applications in Elettra 2.0

Graziano Scalamera, G. Brajnik, Raffaele De Monte, Igor Trovarelli et al.
JACOW
Particle Accelerators and Free-Electron Lasers
article

High-throughput DPDK-based framework for real-time applications in Elettra 2.0

Graziano Scalamera, G. Brajnik, Raffaele De Monte, Igor Trovarelli, Alessio Igor Bogani, Giulio Gaio
article en

Abstract

The Data Plane Development Kit (DPDK) is a framework that enhances real-time communications by providing direct, high-speed access to network interfaces. This architecture centralizes acquisition and control in an HPC cluster, ensuring ultra-fast in-memory updates of all critical data, making it a viable choice for real-time feedback and machine control in particle accelerators. This approach was chosen for Elettra 2.0 to enable pre-mortem beam dump mitigation, more detailed post-mortem inspection, advanced correlation analysis and the implementation of complex control schemes. Time-sensitive applications implemented in C code interact with Beam Position Monitors (BPM), Low-Level RF (LLRF), Beam Loss Monitors (BLM) and Magnetic Power Converters through simple memory read and write operations at megahertz rates, making the system competitive with high-level processing applications based on FPGA architectures. This paper presents the system under test at Elettra, highlighting its architecture, performance, and integration, while demonstrating the successful implementation of Fast Orbit Feedback in parallel with turn-by-turn (TbT) data acquisition from twelve BPMs and an LLRF system.

JACOW
Industry, innovation and infrastructure
Openalex Percentile: Top 83%
Particle Accelerators and Free-Electron Lasers
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High-throughput DPDK-based framework for real-time applications in Elettra 2.0 — Graziano Scalamera, G. Brajnik, et al. · JACOW (2026) | TGRS Research Map | TGRS