Ultra-fast and energy-efficient channel estimation for massive MIMO-OFDM systems with memristor crossbar based in-memory computing

Massive multi-input multi-output (MIMO) signal processing algorithms heavily rely on high-dimension matrix operations, which impose excessively high computational complexity. Moreover, in the post-Moore era, the performance of the classical von Neumann computing architecture is facing severe limitations. The in-memory computing (IMC) technique holds the potential to break the memory wall and enhance the circuit’s energy efficiency. In this paper, we present an memristor crossbar based IMC circuit design for performing the classical least square (LS) channel estimation with high computation parallelism. Simulation results demonstrate that even when considering the writing and reading errors, the mean square error (MSE) of the proposed circuit with 7-bit memristor is almost the same as that achieved by the digital computer. Moreover, the proposed circuit achieves the same level of computing performance as the NVIDIA RTX 6000 Ada Generation, but with about 1/18 times as low computation time and about 25 times as high energy efficiency, as this benchmark commercial processor.