Post-foundry process flow for prototyping silicon optomechanical devices on multi-project wafers

Abstract This work presents a post-foundry process flow for fabricating silicon optomechanical devices on dies made using a multi-project wafer (MPW) run. The dies are initially fabricated using a standard silicon photonics process that lacks the steps to locally remove the oxide cladding and suspend the silicon core layer to create optomechanical devices. Silicon photonics is rapidly advancing, with foundries offering standardized process design kits that have facilitated an increase in photonic circuit density. However, scaling a core photonic element, phase tuning, to large numbers in a single circuit remains challenging. This is due to the weak plasma dispersion effect and the high power consumption and crosstalk of the thermo-optic effect in silicon. Optomechanics is another mechanism for phase tuning that offers low power consumption and CMOS compatibility in a compact footprint, making it an attractive alternative for high-density photonic applications. However, the process flow provided on MPW runs, which offers cost-effective chip fabrication for researchers, does not include the steps necessary for fabricating optomechanical devices, making their prototyping difficult and expensive. In this work, we address the challenges of prototyping optomechanical devices by presenting a process flow that can be used after receiving diced chips from an MPW run. The process incorporates die handling, cleaning, passivation, and etching to remove the oxide cladding locally from the silicon core. We also address challenges such as surface roughening and structural buckling, and provide design rules to create a robust starting point for researchers aiming to prototype novel silicon optomechanical devices.