Swapped optical transpose interconnection system: Fault-tolerant resolvability on cycle graphs

Within computing and information technology, interconnection systems are often modeled using graphs. A notable example is the swapped Optical Transpose Interconnection System (OTIS). Ensuring resilience to faults is crucial in optoelectronic systems. Across different fault classifications that can arise in an interconnection structure, two notable ones are the failure of a node (such as a processor in the case of OTIS over base graph G, denoted by [Formula: see text] and the disruption in facilitating communication between nodes breakdown of processor-to-processor communication). To manage these faults, it is crucial to assign a unique identifier to each node. In terms of graph theory, this corresponds to identifying the metric dimension, denoted as [Formula: see text] and Fault-oriented metric dimension [Formula: see text] of the graph G representing the interlinking structure. This paper analyzes the OTIS architecture based on [Formula: see text] (Cycle graph containing m vertices), represented as [Formula: see text], for resolvability and resolvability under fault conditions. It is proved that [Formula: see text] and [Formula: see text].

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Publication Details

Journal
AKCE International Journal of Graphs and Combinatorics
Published
2026-01-15
DOI
https://doi.org/10.1080/09728600.2025.2601753
Primary Topic
Interconnection Networks and Systems
Type
article
Field-Weighted Citation Impact
0.00
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article

Swapped optical transpose interconnection system: Fault-tolerant resolvability on cycle graphs

Anam Rani, Asima Razzaque
AKCE International Journal of Graphs and Combinatorics
Interconnection Networks and Systems
article

Swapped optical transpose interconnection system: Fault-tolerant resolvability on cycle graphs

Anam Rani, Asima Razzaque
article en

Abstract

Within computing and information technology, interconnection systems are often modeled using graphs. A notable example is the swapped Optical Transpose Interconnection System (OTIS). Ensuring resilience to faults is crucial in optoelectronic systems. Across different fault classifications that can arise in an interconnection structure, two notable ones are the failure of a node (such as a processor in the case of OTIS over base graph G, denoted by [Formula: see text] and the disruption in facilitating communication between nodes breakdown of processor-to-processor communication). To manage these faults, it is crucial to assign a unique identifier to each node. In terms of graph theory, this corresponds to identifying the metric dimension, denoted as [Formula: see text] and Fault-oriented metric dimension [Formula: see text] of the graph G representing the interlinking structure. This paper analyzes the OTIS architecture based on [Formula: see text] (Cycle graph containing m vertices), represented as [Formula: see text], for resolvability and resolvability under fault conditions. It is proved that [Formula: see text] and [Formula: see text].

AKCE International Journal of Graphs and Combinatorics
Bahauddin Zakariya University (PK), King Faisal University (SA)
Openalex Percentile: Top 89%
Interconnection Networks and Systems
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