Executable AADL Models for Early System Qualification Test

This paper presents an approach, called CosiCosi, whose the aim is to characterize the temporal behavior of complex systems. The analyzed systems are defined by their software and hardware architectures, and by the duration of the processing jobs. The abstraction of jobs by their execution time enables early verification, at a phase where all the implementation details of the components are not yet defined. The tool that supports the verification is a SystemC simulator configured from AADL architecture models. It simulates the temporal behavior of the model components, respecting the AADL runtime specification as defined in the standard. The targeted use of the tool is the qualification of hardware/software architectures through intensive testing under an expected workload. The evaluation shows the tool's ability to simulate a system composed of 600 threads, over 1 hour of operation, in approximately 2 minutes on a desktop computer.

Authors

Institutions

Publication Details

Journal
ACM SIGAda Ada Letters
Published
2025-06-01
DOI
https://doi.org/10.1145/3784987.3784991
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Executable AADL Models for Early System Qualification Test

Stephane Rubini, Sébastien Levieux, Hai Nam Tran, Frank Singhoff et al.
ACM SIGAda Ada Letters
Embedded Systems Design Techniques
article

Executable AADL Models for Early System Qualification Test

Stephane Rubini, Sébastien Levieux, Hai Nam Tran, Frank Singhoff, Gilles Le Pluart, Eric Cation
article en

Abstract

This paper presents an approach, called CosiCosi, whose the aim is to characterize the temporal behavior of complex systems. The analyzed systems are defined by their software and hardware architectures, and by the duration of the processing jobs. The abstraction of jobs by their execution time enables early verification, at a phase where all the implementation details of the components are not yet defined. The tool that supports the verification is a SystemC simulator configured from AADL architecture models. It simulates the temporal behavior of the model components, respecting the AADL runtime specification as defined in the standard. The targeted use of the tool is the qualification of hardware/software architectures through intensive testing under an expected workload. The evaluation shows the tool's ability to simulate a system composed of 600 threads, over 1 hour of operation, in approximately 2 minutes on a desktop computer.

ACM SIGAda Ada LettersVol. 45(1)
Thales (Portugal) (PT), Centre National de la Recherche Scientifique (FR), Université de Bretagne Occidentale (FR), Thales (Australia) (AU), Laboratoire des Sciences et Techniques de l’Information de la Communication et de la Connaissance (FR)
Industry, innovation and infrastructure
Openalex Percentile: Top 29%
Embedded Systems Design Techniques
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.