Latency and Memory Analysis of Post-Training Quantization on MobileNetV2 for Resource-Constrained IoT Edge Nodes

Vision-based railway track inspection has gained attention as a means to improve safety and reduce reliance on manual monitoring. While deep convolutional neural networks have demonstrated high detection accuracy, their deployment on resource-constrained edge devices remains challenging due to strict memory and latency limitations. This work investigates the trade-offs between model size, inference latency, and detection accuracy when deploying MobileNetV2 for railway track fault detection under constrained computational environments. Using transfer learning, a MobileNetV2-based classifier is trained on a railway track image dataset, and post-training INT8 quantization is applied using TensorFlow Lite to enable deployment on microcontroller-class hardware. The study provides an empirical characterization of accuracy–latency–memory trade-offs when deploying quantized convolutional neural networks on low-power edge devices. Experimental results show that post-training quantization reduces model size by approximately 91.7% while incurring only a marginal accuracy degradation of around 2% compared to the floating-point baseline. Inference latency remains within sub-second bounds on an ESP32-based platform, demonstrating the feasibility of real-time, offline decision support for safety-critical inspection tasks. These findings highlight the practicality of post-training quantization as an effective approach for deploying deep learning models in latency-sensitive and resource-constrained edge AI applications.