The Simply-V Framework: An Extensible RISC-V Reconfigurable Soft-SoC for Open Research and Fast Prototyping

The recent rise of open hardware, mainly driven by the momentum of the RISC-V ecosystem, has sparked significant innovation in the development of open-source CPUs and SoCs. This movement has enabled broad exploration across academia and industry, fostering collaboration and reuse. However, the diversity and openness that empower this space also introduce challenges: academic projects often fall short of industry-grade robustness, and meaningful comparison across hardware platforms remains difficult due to ad hoc infrastructures, lack of standardization, and simulation limitations. To ease the work of researchers some key challenges must be faced in open hardware development: platforms’ reconfigurability, ease of integration of third-party IPs, and support for technological heterogeneity. A core problem lies in validating and comparing CPUs and SoC components across varying protocols, toolchains, and design languages, especially in real hardware settings. To address these issues, we present Simply-V, a flexible FPGA-based soft-SoC platform designed for rapid prototyping and open hardware research. Simply-V enables plug-and-play support for multiple CPUs, IPs and accelerators, offers structured configurability across embedded and high-performance profiles, and supports the integration of both RTL and HLS-based components. Capabilities such as a high-level configuration flow, frequency scaling, and cross-device portability make our platform a powerful tool to simplify open hardware research. We demonstrate the SoC generator’s capabilities through multi-task FreeRTOS examples, platform-fair CPU benchmarking and the iterative development of HLS-designed convolutional accelerators. Moreover, we validate multi-accelerator and multi-CPU scalability and compare with the state-of-the-art SoC generators. Our platform showcases simplified fast prototyping, configurability, scalability and heterogeneous IP support on real hardware. Simply-V is openly available at https://github.com/HiSA-Team/Simply-V .

Authors

Institutions

Publication Details

Journal
ACM Transactions on Design Automation of Electronic Systems
Published
2026-01-05
DOI
https://doi.org/10.1145/3787500
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

The Simply-V Framework: An Extensible RISC-V Reconfigurable Soft-SoC for Open Research and Fast Prototyping

Stefano Mercogliano, Vincenzo Maisto, Alessandro Cilardo, Manuel Maddaluno
ACM Transactions on Design Automation of Electronic Systems
Embedded Systems Design Techniques
article

The Simply-V Framework: An Extensible RISC-V Reconfigurable Soft-SoC for Open Research and Fast Prototyping

Stefano Mercogliano, Vincenzo Maisto, Alessandro Cilardo, Manuel Maddaluno
article en

Abstract

The recent rise of open hardware, mainly driven by the momentum of the RISC-V ecosystem, has sparked significant innovation in the development of open-source CPUs and SoCs. This movement has enabled broad exploration across academia and industry, fostering collaboration and reuse. However, the diversity and openness that empower this space also introduce challenges: academic projects often fall short of industry-grade robustness, and meaningful comparison across hardware platforms remains difficult due to ad hoc infrastructures, lack of standardization, and simulation limitations. To ease the work of researchers some key challenges must be faced in open hardware development: platforms’ reconfigurability, ease of integration of third-party IPs, and support for technological heterogeneity. A core problem lies in validating and comparing CPUs and SoC components across varying protocols, toolchains, and design languages, especially in real hardware settings. To address these issues, we present Simply-V, a flexible FPGA-based soft-SoC platform designed for rapid prototyping and open hardware research. Simply-V enables plug-and-play support for multiple CPUs, IPs and accelerators, offers structured configurability across embedded and high-performance profiles, and supports the integration of both RTL and HLS-based components. Capabilities such as a high-level configuration flow, frequency scaling, and cross-device portability make our platform a powerful tool to simplify open hardware research. We demonstrate the SoC generator’s capabilities through multi-task FreeRTOS examples, platform-fair CPU benchmarking and the iterative development of HLS-designed convolutional accelerators. Moreover, we validate multi-accelerator and multi-CPU scalability and compare with the state-of-the-art SoC generators. Our platform showcases simplified fast prototyping, configurability, scalability and heterogeneous IP support on real hardware. Simply-V is openly available at https://github.com/HiSA-Team/Simply-V .

ACM Transactions on Design Automation of Electronic SystemsVol. 31(3)
Federico II University Hospital (IT), University of Naples Federico II (IT)
Industry, innovation and infrastructure
Openalex Percentile: Top 97%
Embedded Systems Design Techniques
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.