Performance Simulation and Optimal Design for Silicon–Nitride Arrayed Waveguide Grating

Silicon–nitride (SiN) waveguides have emerged as fundamental building blocks in silicon photonic integrated circuits (Si-PICs), offering advantages that compensate for the intrinsic limitations of silicon-on-insulator (SOI) and silica-on-silicon (SOS) platforms. In this work, two sizes of single-mode SiN strip waveguides are investigated: (i) 600 nm wide strip waveguide cores on a 400 nm thick Si3N4 film and (ii) 1.0 µm wide strip waveguide cores on a 1.0 µm thick Si3N4 film. First, we design two AWG architectures and develop a generalized theoretical model for one of the key specifications—polarization mode dispersion (PMD)—by considering a pair of orthogonal polarization states in these two waveguides. Then, as the two-size SiN waveguides are generally fabricated via multiple operating processes of coating, photolithography, and etching, we investigate the dependences of PMD performances on the device errors of the two AWG architectures caused by the coating/manufacturing qualities and accuracies, and the dependences of PMD performance on the refractive index errors of the waveguide core. As a consequence, the softwaretool simulations for the two AWG architectures of 40-channel 0.8 nm channelspacing show that the average PMDs of the above two waveguide sizes are <0.50 ps and <0.35 ps, respectively, and the PMD responses to the ±10% fabrication error are < ±0.20 ps and ±10% fluctuation, respectively, but the ±2.5% variations have no obvious impacts upon the PMD performance. Therefore, it turns out that the PMD performance of a smaller waveguide has a relatively strong error sensitivity to the AWG architecture, while the larger waveguide size has a relatively weak error sensitivity to the AWG architecture.