Hybrid algorithm based optimization strategies for analog circuit sizing in low dropout regulators

Analog and Mixed Signal circuit sizing with large-scale parameters requires a lot of simulations, especially in non-linear topology where large-signal analysis is a need. Reducing the number of simulations and in general the total design cycle time, is the main objective for optimal sizing of complicated circuits. In this work a circuit sizing automated design methodology is presented using the hybrid dual annealing and Nelder–Mead algorithm, significantly reducing the design cycle time and the required number of transient simulations. A customized hybrid algorithm environment using Dual Annealing and Nelder–Mead is developed where the optimization process is divided into different optimization sub-steps. The proposed hybrid algorithm based method achieves rapid convergence to the needed circuit performance specification. It uses combinations of direct search algorithms to separate metric evaluation accelerating the performance specifications convergence speed in a large parameter space. A complicated non-linear topology like a product level low-dropout (LDO) regulator, in 180 nm process node, with 30 parameters is used as the circuit vehicle to verify the proposed methodology. The sizing process converged with less than 1700 simulations having as input just the circuit schematic with no prior sizing knowledge. Sub optimization is also performed focused on each analysis type - DC, AC and transient, with a focus on reducing the number of transient simulations. The proposed combined algorithm method achieved 31 % faster convergence speed compared to the state-of-the-art methods and handles efficiently each simulation analysis. • Analog circuits have metrics that in general need different simulation types for evaluation. A number of combinations of algorithms are proposed to optimize different sub-stages of the process. • A large LDO circuit is used as a base for the demonstration and comparison of the methodologies, with 30 parameters and 10 performance metrics. • Significant number of transient analysis simulations is reduced (31%), keeping the result within the error limits, using the best performing hybrid algorithms that include Nelder–Mead, Dual Annealing, NSGA-II, etc.

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Publication Details

Journal
Integration
Published
2026-01-05
DOI
https://doi.org/10.1016/j.vlsi.2026.102646
Primary Topic
VLSI and FPGA Design Techniques
Type
article
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article

Hybrid algorithm based optimization strategies for analog circuit sizing in low dropout regulators

G. Pelz, A. Buzo, T. Noulis, S. Karipidis
Integration
VLSI and FPGA Design Techniques
article

Hybrid algorithm based optimization strategies for analog circuit sizing in low dropout regulators

G. Pelz, A. Buzo, T. Noulis, S. Karipidis
article en

Abstract

Analog and Mixed Signal circuit sizing with large-scale parameters requires a lot of simulations, especially in non-linear topology where large-signal analysis is a need. Reducing the number of simulations and in general the total design cycle time, is the main objective for optimal sizing of complicated circuits. In this work a circuit sizing automated design methodology is presented using the hybrid dual annealing and Nelder–Mead algorithm, significantly reducing the design cycle time and the required number of transient simulations. A customized hybrid algorithm environment using Dual Annealing and Nelder–Mead is developed where the optimization process is divided into different optimization sub-steps. The proposed hybrid algorithm based method achieves rapid convergence to the needed circuit performance specification. It uses combinations of direct search algorithms to separate metric evaluation accelerating the performance specifications convergence speed in a large parameter space. A complicated non-linear topology like a product level low-dropout (LDO) regulator, in 180 nm process node, with 30 parameters is used as the circuit vehicle to verify the proposed methodology. The sizing process converged with less than 1700 simulations having as input just the circuit schematic with no prior sizing knowledge. Sub optimization is also performed focused on each analysis type - DC, AC and transient, with a focus on reducing the number of transient simulations. The proposed combined algorithm method achieved 31 % faster convergence speed compared to the state-of-the-art methods and handles efficiently each simulation analysis. • Analog circuits have metrics that in general need different simulation types for evaluation. A number of combinations of algorithms are proposed to optimize different sub-stages of the process. • A large LDO circuit is used as a base for the demonstration and comparison of the methodologies, with 30 parameters and 10 performance metrics. • Significant number of transient analysis simulations is reduced (31%), keeping the result within the error limits, using the best performing hybrid algorithms that include Nelder–Mead, Dual Annealing, NSGA-II, etc.

IntegrationVol. 108
Infineon Technologies (Germany) (DE), Aristotle University of Thessaloniki (GR), Hellenic Agency for Local Development and Local Government (GR)
Openalex Percentile: Top 97%
VLSI and FPGA Design Techniques
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