INVCAM: An Inverted Compressor-Based Approximate Multiplier

In this paper, a novel 8-bit approximate multiplier, called INVCAM, is proposed in which the inverted partial products (PPs) are summed using approximate 4:2 compressors. This design allows for flexibility in applying approximations, enabling the multiplier to be tuned to the specific accuracy requirements of different applications. By adjusting the number of approximated bits, the multiplier can operate with a better balance between desirable hardware characteristics and acceptable levels of error. Our approach ensures that INVCAM is customizable for a wide range of applications. The results indicate that INVCAM reduces delay, power, and area by up to 21.5%, 70.0%, and 57.6%, respectively, compared to the state-of-the-art (SoTA) approximate multipliers within its mean relative error distance (MRED) range, and by 42.4%, 80.1%, and 68%, compared to an exact multiplier. The efficacy of INVCAM is evaluated in image processing and deep neural network (DNN) applications. The images processed by different configurations of INVCAM have PSNR and SSIM values greater than 28.9 dB and 0.81, respectively, which manifests the acceptable quality of the processed approximate images. In the DNN application, the classification accuracy of the models implemented using INVCAM(7) is within 0.6% of the original model accuracy. When the number of approximate bits is increased to nine, less than 5% accuracy reduction is observed compared to an exact model, while the power-delay-area product of the multiplier improves by 46%.

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Publication Details

Journal
Electronics
Published
2026-01-02
DOI
https://doi.org/10.3390/electronics15010216
Citations
1
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
21.93
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article

INVCAM: An Inverted Compressor-Based Approximate Multiplier

Nima Amirafshar, Nima TaheriNejad, Shaghayegh Vahdat, Sahand Divsalar et al.
1 citations
Electronics
Low-power high-performance VLSI design
21.93
article

INVCAM: An Inverted Compressor-Based Approximate Multiplier

Nima Amirafshar, Nima TaheriNejad, Shaghayegh Vahdat, Sahand Divsalar, Kimia Darabi
article en
1 citations

Abstract

In this paper, a novel 8-bit approximate multiplier, called INVCAM, is proposed in which the inverted partial products (PPs) are summed using approximate 4:2 compressors. This design allows for flexibility in applying approximations, enabling the multiplier to be tuned to the specific accuracy requirements of different applications. By adjusting the number of approximated bits, the multiplier can operate with a better balance between desirable hardware characteristics and acceptable levels of error. Our approach ensures that INVCAM is customizable for a wide range of applications. The results indicate that INVCAM reduces delay, power, and area by up to 21.5%, 70.0%, and 57.6%, respectively, compared to the state-of-the-art (SoTA) approximate multipliers within its mean relative error distance (MRED) range, and by 42.4%, 80.1%, and 68%, compared to an exact multiplier. The efficacy of INVCAM is evaluated in image processing and deep neural network (DNN) applications. The images processed by different configurations of INVCAM have PSNR and SSIM values greater than 28.9 dB and 0.81, respectively, which manifests the acceptable quality of the processed approximate images. In the DNN application, the classification accuracy of the models implemented using INVCAM(7) is within 0.6% of the original model accuracy. When the number of approximate bits is increased to nine, less than 5% accuracy reduction is observed compared to an exact model, while the power-delay-area product of the multiplier improves by 46%.

ElectronicsVol. 15(1)
Heidelberg University (DE), University of Tehran (IR)
Openalex Percentile: Top 3%
Low-power high-performance VLSI design
21.93
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INVCAM: An Inverted Compressor-Based Approximate Multiplier — Nima Amirafshar, Nima TaheriNejad, et al. · Electronics (2026) | TGRS Research Map | TGRS