Solution-crystallized and conductivity-tailored ultrathin-body indium oxide for high-bias-stress-robust enhancement-mode transistors

Oxide semiconductors have emerged as promising candidates for next-generation electronic devices due to their inherent advantages. However, achieving high stability under strong gate bias stress remains a critical challenge, especially for applications in advanced electronic systems. In this study, we propose a conductivity-tailored thermal crystallization strategy to significantly reduce the high-bias-stress-induced instability of indium oxide (InO X ) thin-film transistors (TFTs). The introduction of yttrium oxide (YO X ) capping layer effectively suppresses the unintended excessive free electrons induced during thermal annealing, thereby preventing the degradation of threshold voltage (V T ) and on/off current ratio. As a result, the proposed crystallization approach simultaneously enables excellent initial electrical performance and enhanced bias stability. Notably, the dependence of V T shift (ΔV T ) on electric field stress (E STR ), i.e., the slope of the ΔV T with respect to the E STR , was highly decreased for high-crystalline InO X /YO X TFTs compared to the control group. The mathematical relationship between ΔV T and E STR , along with the interpretation of the stretched exponential model parameters reflecting the physical mechanisms of device degradation, suggests that thermal crystallization suppresses the electron trapping in acceptor-like trap states in the bulk InO X , Thereby, these mechanisms contribute to the dramatic enhancement in high-electric field stability. These findings underscore the importance of microstructural engineering in oxide semiconductors for emerging applications requiring robust gate-field endurance and long-term device stability, including monolithic 3D integration, memory, and advanced display technologies.