Is RISC-V for embedded systems ready for mass adoption?

This thesis investigates the practical viability of RISC-V microcontrollers for embedded systems by implementing and evaluating a RISC-V-based development platform using the Raspberry Pi Pico 2. While RISC-V has been a topic of interest among software developers for over a decade, the technology has gained traction in recent years, with the emergence of commercial SoCs, microcontrollers, and a growing ecosystem of tools and documentation. This shift has made RISC-V increasingly relevant not only for research and prototyping but also for broader educational and industrial use. To explore whether RISC-V is ready for use in real-world embedded systems, this project avoids overly complex applications and instead adapts a set of practical experiments from the CT1 Course. These include basic input/output handling, memory operations, subroutines, and interrupt handling, representative tasks in typical embedded development. Each experiment is re-implemented on a custom RISC-V platform using C or assembly language, allowing for a structured evaluation of the architecture and toolchain at multiple levels. Key contributions include the design and manufacture of a custom PCB, modeled after the ARM-based CT-Board used in the ZHAW Computertechnik course, equipped with DIP-switches, LEDs, and other peripherals for testing. A RISC-V development workflow was established, covering assembly programming, debugging, and verification. The selected lab exercises were successfully ported to the new platform, and technical challenges, such as limited I/O and the lack of native debug support, were analyzed with proposed workarounds. The results provide a realistic assessment of the current strengths and weaknesses of RISCV for embedded systems. Rather than benchmarking raw performance, the project focused on aspects such as instruction usage, code density, tool support, and programming workflow. The findings show that RISC-V is already a viable option, particularly in education and prototyping, while also offering long-term potential in broader commercial usage. The complete implementation and supporting files are available in the project repository, as referenced in Section 12.1, Repository and Resources, of the appendix.

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Publication Details

Journal
Zürcher Hochschule für Angewandte Wissenschaften digital collection (Zurich University of Applied Sciences)
Published
2025-06-06
DOI
https://doi.org/10.21256/zhaw-34862
Primary Topic
Real-Time Systems Scheduling
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article
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article

Is RISC-V for embedded systems ready for mass adoption?

Alejandro Horvat, Timo Wey
Zürcher Hochschule für Angewandte Wissenschaften digital collection (Zurich University of Applied Sciences)
Real-Time Systems Scheduling
article

Is RISC-V for embedded systems ready for mass adoption?

Alejandro Horvat, Timo Wey
article en

Abstract

This thesis investigates the practical viability of RISC-V microcontrollers for embedded systems by implementing and evaluating a RISC-V-based development platform using the Raspberry Pi Pico 2. While RISC-V has been a topic of interest among software developers for over a decade, the technology has gained traction in recent years, with the emergence of commercial SoCs, microcontrollers, and a growing ecosystem of tools and documentation. This shift has made RISC-V increasingly relevant not only for research and prototyping but also for broader educational and industrial use. To explore whether RISC-V is ready for use in real-world embedded systems, this project avoids overly complex applications and instead adapts a set of practical experiments from the CT1 Course. These include basic input/output handling, memory operations, subroutines, and interrupt handling, representative tasks in typical embedded development. Each experiment is re-implemented on a custom RISC-V platform using C or assembly language, allowing for a structured evaluation of the architecture and toolchain at multiple levels. Key contributions include the design and manufacture of a custom PCB, modeled after the ARM-based CT-Board used in the ZHAW Computertechnik course, equipped with DIP-switches, LEDs, and other peripherals for testing. A RISC-V development workflow was established, covering assembly programming, debugging, and verification. The selected lab exercises were successfully ported to the new platform, and technical challenges, such as limited I/O and the lack of native debug support, were analyzed with proposed workarounds. The results provide a realistic assessment of the current strengths and weaknesses of RISCV for embedded systems. Rather than benchmarking raw performance, the project focused on aspects such as instruction usage, code density, tool support, and programming workflow. The findings show that RISC-V is already a viable option, particularly in education and prototyping, while also offering long-term potential in broader commercial usage. The complete implementation and supporting files are available in the project repository, as referenced in Section 12.1, Repository and Resources, of the appendix.

Zürcher Hochschule für Angewandte Wissenschaften digital collection (Zurich University of Applied Sciences)
Gender equality
Openalex Percentile: Top 30%
Real-Time Systems Scheduling
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Is RISC-V for embedded systems ready for mass adoption? — Alejandro Horvat, Timo Wey · Zürcher Hochschule für Angewandte Wissenschaften digital collection (Zurich University of Applied Sciences) (2025) | TGRS Research Map | TGRS