Dynamical Information Geometry (DIG), Part III: Hardware Validation of an Operational Consequence

Preprint: This work is a preprint, has not undergone peer review, and is made publicly available to establish a public scientific record. This publication presents a hardware validation of a minimal, sign-based operational consequence of the Dynamical Information Geometry (DIG) framework on real quantum devices. The work introduces no new theory and no numerical modeling. Instead, it tests a single operational hypothesis (OD-DIG-H1) on heterogeneous quantum hardware platforms, including IBM Quantum and AWS Braket (IonQ). The operational quantity tested is the sign of the leakage differenceΔLeak = Leak_LENS − Leak_CTRL,with leakage defined as Leak = 1 − P(b_ref). The reference bitstring is defined per run as b_ref = mode(CTRL), ensuring a hardware-agnostic reference choice. For all included hardware runs, the observed sign of ΔLeak is positive under the stated operational definition. The analysis is deliberately restricted to sign-only reporting and excludes fitting procedures, noise mitigation, or quantitative cross-platform comparisons. The results are supported by a publicly available, immutable hardware dataset archived on Zenodo. Related works (for reference and context): DIG Part I (theoretical framework):https://doi.org/10.5281/zenodo.17983399 DIG Part II (numerical validation):https://doi.org/10.5281/zenodo.17982058 DIG — N1 (definitions and scope):https://doi.org/10.5281/zenodo.18001179 Dynamical Information Geometry (DIG) – Hardware Validation Dataset:https://doi.org/10.5281/zenodo.18099420 DIG Part IV (regime structure and operational context):https://doi.org/10.5281/zenodo.18202656 DIG Part V (multidimensional formulation):https://doi.org/10.5281/zenodo.18210315 DIG Part VI (scaling 1D hardware validation): https://doi.org/10.5281/zenodo.18226369 DIG Part VII Dynamical Information Geometry:Two-Dimensional Twin-Sign Validation under Fixed Audit and Regime Constraintshttps://doi.org/10.5281/zenodo.18313460 DIG — N2 (definitions/interpretation/non-equivalences) https://doi.org/10.5281/zenodo.18380514 Correspondence regarding this work may be directed to:[email protected]

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Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2025-12-30
DOI
https://doi.org/10.5281/zenodo.18100056
Primary Topic
Quantum Computing Algorithms and Architecture
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article
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article

Dynamical Information Geometry (DIG), Part III: Hardware Validation of an Operational Consequence

Detlev Buck, Cueneyt Kaya
Zenodo (CERN European Organization for Nuclear Research)
Quantum Computing Algorithms and Architecture
article

Dynamical Information Geometry (DIG), Part III: Hardware Validation of an Operational Consequence

Detlev Buck, Cueneyt Kaya
article en

Abstract

Preprint: This work is a preprint, has not undergone peer review, and is made publicly available to establish a public scientific record. This publication presents a hardware validation of a minimal, sign-based operational consequence of the Dynamical Information Geometry (DIG) framework on real quantum devices. The work introduces no new theory and no numerical modeling. Instead, it tests a single operational hypothesis (OD-DIG-H1) on heterogeneous quantum hardware platforms, including IBM Quantum and AWS Braket (IonQ). The operational quantity tested is the sign of the leakage differenceΔLeak = Leak_LENS − Leak_CTRL,with leakage defined as Leak = 1 − P(b_ref). The reference bitstring is defined per run as b_ref = mode(CTRL), ensuring a hardware-agnostic reference choice. For all included hardware runs, the observed sign of ΔLeak is positive under the stated operational definition. The analysis is deliberately restricted to sign-only reporting and excludes fitting procedures, noise mitigation, or quantitative cross-platform comparisons. The results are supported by a publicly available, immutable hardware dataset archived on Zenodo. Related works (for reference and context): DIG Part I (theoretical framework):https://doi.org/10.5281/zenodo.17983399 DIG Part II (numerical validation):https://doi.org/10.5281/zenodo.17982058 DIG — N1 (definitions and scope):https://doi.org/10.5281/zenodo.18001179 Dynamical Information Geometry (DIG) – Hardware Validation Dataset:https://doi.org/10.5281/zenodo.18099420 DIG Part IV (regime structure and operational context):https://doi.org/10.5281/zenodo.18202656 DIG Part V (multidimensional formulation):https://doi.org/10.5281/zenodo.18210315 DIG Part VI (scaling 1D hardware validation): https://doi.org/10.5281/zenodo.18226369 DIG Part VII Dynamical Information Geometry:Two-Dimensional Twin-Sign Validation under Fixed Audit and Regime Constraintshttps://doi.org/10.5281/zenodo.18313460 DIG — N2 (definitions/interpretation/non-equivalences) https://doi.org/10.5281/zenodo.18380514 Correspondence regarding this work may be directed to:[email protected]

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