Symmetrical and High-Speed CMOS Inverter Design Using Hybrid PSOGSA Optimization Algorithm

Complementary Metal-Oxide-Semiconductor (CMOS) inverters are fundamental building blocks in digital integrated circuits (ICs), where achieving high-speed operation and symmetrical switching characteristics remains a significant design challenge.Traditional optimization methods often fall short in balancing the trade-offs between performance parameters such as rise time, fall time, and propagation delay.This paper presents a novel approach using a hybrid metaheuristic algorithm, Particle Swarm Optimization combined with the Gravitational Search Algorithm (PSOGSA), to optimize CMOS inverter design parameters effectively.The proposed method leverages the global search capability of PSO and the local refinement ability of GSA to enhance both convergence speed and solution quality.The research explores eight sets of design parameter constraints under three key optimization cases: (i) minimizing fall time, (ii) achieving symmetrical rise time (tr) and fall times (tf) and (iii) balancing propagation delays like high to low (tpHL) and low to high (tpLH) The optimized inverter circuit was implemented in the 45 nm technology in cadence EDA tool.The performance of PSOGSA-optimized inverters is benchmarked against results from PSpice simulations and seven conventional optimization techniques.Simulation results reveal that the proposed PSOGSA method achieves propagation delays in the range of 0.54-0.63ns while maintaining switching symmetry between 97% and 99%.These outcomes highlight the algorithm's effectiveness in delivering robust, high-performance CMOS inverter designs with enhanced switching uniformity.The proposed methodology offers a promising optimization strategy for future low-power and high-speed VLSI applications.

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Publication Details

Journal
Tehnicki vjesnik - Technical Gazette
Published
2025-12-30
DOI
https://doi.org/10.17559/tv-20250411002584
Primary Topic
Low-power high-performance VLSI design
Type
article
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article

Symmetrical and High-Speed CMOS Inverter Design Using Hybrid PSOGSA Optimization Algorithm

G Mohanbabu, V. P. Jay Fantin
Tehnicki vjesnik - Technical Gazette
Low-power high-performance VLSI design
article

Symmetrical and High-Speed CMOS Inverter Design Using Hybrid PSOGSA Optimization Algorithm

G Mohanbabu, V. P. Jay Fantin
article en

Abstract

Complementary Metal-Oxide-Semiconductor (CMOS) inverters are fundamental building blocks in digital integrated circuits (ICs), where achieving high-speed operation and symmetrical switching characteristics remains a significant design challenge.Traditional optimization methods often fall short in balancing the trade-offs between performance parameters such as rise time, fall time, and propagation delay.This paper presents a novel approach using a hybrid metaheuristic algorithm, Particle Swarm Optimization combined with the Gravitational Search Algorithm (PSOGSA), to optimize CMOS inverter design parameters effectively.The proposed method leverages the global search capability of PSO and the local refinement ability of GSA to enhance both convergence speed and solution quality.The research explores eight sets of design parameter constraints under three key optimization cases: (i) minimizing fall time, (ii) achieving symmetrical rise time (tr) and fall times (tf) and (iii) balancing propagation delays like high to low (tpHL) and low to high (tpLH) The optimized inverter circuit was implemented in the 45 nm technology in cadence EDA tool.The performance of PSOGSA-optimized inverters is benchmarked against results from PSpice simulations and seven conventional optimization techniques.Simulation results reveal that the proposed PSOGSA method achieves propagation delays in the range of 0.54-0.63ns while maintaining switching symmetry between 97% and 99%.These outcomes highlight the algorithm's effectiveness in delivering robust, high-performance CMOS inverter designs with enhanced switching uniformity.The proposed methodology offers a promising optimization strategy for future low-power and high-speed VLSI applications.

Tehnicki vjesnik - Technical GazetteVol. 33(1)
Chennai Mathematical Institute (IN), Social Service Sericulture Project Trust (IN)
Openalex Percentile: Top 41%
Low-power high-performance VLSI design
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