Twins: Hardware Similarity Evaluation Framework Using Graph Neural Network

The globalization of the integrated circuit supply chain has introduced untrustworthy entities at various stages, arousing increasing attention to hardware security research from both academia and industry. Some tasks in hardware security research require matching two hardware designs. For example, in gate-level netlist reverse engineering, after recovering module boundaries and hierarchical structure from a netlist, one must match each candidate module against known library components to validate its functionality. Likewise, in Intellectual Property (IP) piracy detection, a suspected infringing IP can be matched against its original counterpart to determine whether infringement has occurred. We design and implement a hardware similarity evaluation framework called Twins. We develop two versions of the framework, called Twins-v1 with the basic Graph Neural Network (GNN) model and Twins-v2 with the node-independent GNN model, respectively. Twins employs a more effective training approach that substantially reduces training time and improves evaluation metrics compared to the current state-of-the-art models. Furthermore, to the best of our knowledge, Twins-v2 represents the first work to use independent graph convolutional network layers based on different node types in the context of hardware security research. The novel netlist graph extraction method has also been experimentally demonstrated to outperform the previously employed data flow graph approach in hardware similarity evaluation tasks. After conducting experimental evaluations on a dataset comprising 305 circuits, both Twins-v1 and Twins-v2 significantly surpass existing methods in terms of prediction accuracy and efficiency.