A low-offset balanced inverter and its application to a current-integrating delta-sigma ADC

This paper proposes a low-offset balanced inverter that forms a push-pull structure using two composite transistors. Each composite transistor operates as either a current-sourcing or a current-sinking device, and can replace both the PMOS and NMOS transistors in a CMOS inverter. The symmetry between the pull-up and pull-down paths achieves a very low offset, enabling the implementation of a single-ended, lossless integrator without requiring any offset cancellation. The proposed balanced inverter is applied to realize a second-order delta-sigma ADC that digitizes the integration of extremely weak input currents from the resistor. Experimental results from the fabricated chip demonstrate that the resistor measuring ADC achieved a 0.4-Ω resolution over 106-dB dynamic range, confirming its practical applicability despite the process and temperature variations.