Development and Characterization of a Gold-Bump Flip-Chip Bonding Process for RF IC Applications

Gold bump flip-chip interposers on glass offer the low-parasitic interconnects required for next-generation RF system-in-package (SiP) assemblies. Existing approaches often rely on multilayer metal stacks and complex bonding profiles. This work presents a simplified alternative: a single-layer Ti/Au ground-signal-ground coplanar waveguide interposer, bonded to a GaN chip using <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$70 \mu \mathrm{m}$</tex> thermosonically placed gold bumps. The process encompasses bump formation, flip-chip thermocompression, and open-short de-embedding. Broadband electrical measurements are reduced to a lumped-element bump model, which can be directly integrated into a process design kit, enabling cost-effective RF SiP prototyping on glass substrates.