1/ <i>f</i> noise model for extracting bulk trap density in scaled metal oxide semiconductor field effect transistors

1/f noise analysis is a powerful tool for characterizing defects in the bulk of the gate oxide of metal oxide semiconductor field effect transistors (MOSFETs). The bulk trap density (NBT) is often extracted from the commonly used carrier number fluctuation model. This model fits well with thicker gate oxide devices but does not capture the effect of oxide scaling on the 1/f noise. As a result, it yields an error of several orders of magnitude in estimating NBT in the scaled devices. In this work, we derive a compact expression of drain current noise power spectral density (SID) that accurately estimates NBT for scaled devices. Our expression includes terms that account for the position dependence of traps, which is often neglected in previous studies. We validate the robustness of the model by comparing it with the calibrated technology computer-aided design simulations of the advanced 22 nm ultrathin body and buried oxide fully depleted silicon-on-insulator MOSFET device operating in linear, saturation, and subthreshold regions.

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Journal
Journal of Applied Physics
Published
2025-12-22
DOI
https://doi.org/10.1063/5.0299430
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

1/ f noise model for extracting bulk trap density in scaled metal oxide semiconductor field effect transistors

Pardeep Duhan, Mohit D. Ganeriwala, Prabhat Khedgarkar, Gangadhar Gupta
Journal of Applied Physics
Advancements in Semiconductor Devices and Circuit Design
article

1/ f noise model for extracting bulk trap density in scaled metal oxide semiconductor field effect transistors

Pardeep Duhan, Mohit D. Ganeriwala, Prabhat Khedgarkar, Gangadhar Gupta
article en

Abstract

1/f noise analysis is a powerful tool for characterizing defects in the bulk of the gate oxide of metal oxide semiconductor field effect transistors (MOSFETs). The bulk trap density (NBT) is often extracted from the commonly used carrier number fluctuation model. This model fits well with thicker gate oxide devices but does not capture the effect of oxide scaling on the 1/f noise. As a result, it yields an error of several orders of magnitude in estimating NBT in the scaled devices. In this work, we derive a compact expression of drain current noise power spectral density (SID) that accurately estimates NBT for scaled devices. Our expression includes terms that account for the position dependence of traps, which is often neglected in previous studies. We validate the robustness of the model by comparing it with the calibrated technology computer-aided design simulations of the advanced 22 nm ultrathin body and buried oxide fully depleted silicon-on-insulator MOSFET device operating in linear, saturation, and subthreshold regions.

Journal of Applied PhysicsVol. 138(24)
Indian Institute of Technology Ropar (IN), Indian Institute of Technology Kanpur (IN)
Ministry of Education, India, Indian Institute of Technology Ropar
Openalex Percentile: Top 43%
Advancements in Semiconductor Devices and Circuit Design
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