Remote Plasma Selective Silicon Etching Enabled Tunable Sub-Fin Process for Improved Parasitic Bottom Channel Control in Gate-All-Around Nanosheet Field-Effect Transistors

The parasitic Sub-Fin, beneath the stacked nanosheet FETs, limits both leakage and heat dissipation, acting as the bottleneck for improving the performance of NS-FETs. A Sub-Fin edit technology based on remote plasma etching is proposed to modulate the formation of the Sub-Fin. By controlling the process parameters, the Sub-Fin profile can be continuously modulated from "arrow-shaped" to "bell-shaped," which provides the flexibility to improve the thermal resistance and reduce the parasitic Sub-Fin-induced degradation, making it suitable for low-power and high-performance applications, respectively. The Sub-Fin edit technology is fully compatible with mature Gate-All-Around (GAA) fabrication processes and offers a feasible approach to balancing the trade-off between Sub-Fin degradation and heat dissipation through the Sub-Fin.

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Publication Details

Journal
Nanomaterials
Published
2025-12-21
DOI
https://doi.org/10.3390/nano16010013
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
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article

Remote Plasma Selective Silicon Etching Enabled Tunable Sub-Fin Process for Improved Parasitic Bottom Channel Control in Gate-All-Around Nanosheet Field-Effect Transistors

Jiayang Li, Y. H. Gao, David Wei Zhang
Nanomaterials
Advancements in Semiconductor Devices and Circuit Design
article

Remote Plasma Selective Silicon Etching Enabled Tunable Sub-Fin Process for Improved Parasitic Bottom Channel Control in Gate-All-Around Nanosheet Field-Effect Transistors

Jiayang Li, Y. H. Gao, David Wei Zhang
article en

Abstract

The parasitic Sub-Fin, beneath the stacked nanosheet FETs, limits both leakage and heat dissipation, acting as the bottleneck for improving the performance of NS-FETs. A Sub-Fin edit technology based on remote plasma etching is proposed to modulate the formation of the Sub-Fin. By controlling the process parameters, the Sub-Fin profile can be continuously modulated from "arrow-shaped" to "bell-shaped," which provides the flexibility to improve the thermal resistance and reduce the parasitic Sub-Fin-induced degradation, making it suitable for low-power and high-performance applications, respectively. The Sub-Fin edit technology is fully compatible with mature Gate-All-Around (GAA) fabrication processes and offers a feasible approach to balancing the trade-off between Sub-Fin degradation and heat dissipation through the Sub-Fin.

NanomaterialsVol. 16(1)
Chinese Academy of Sciences (CN), Fudan University (CN), Shanghai Fudan Microelectronics (China) (CN), Shanghai Institute of Microsystem and Information Technology (CN)
Openalex Percentile: Top 43%
Advancements in Semiconductor Devices and Circuit Design
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