A Design Methodology for RF/mmWave LNAs in 22 nm FD-SOI with Cross-Coupling-Aware Nested Inductors and On-Chip Baluns

In this work, a layout-level design methodology is presented for Low-Noise Amplifiers (LNAs), targeting a wide frequency spectrum from RF to millimeter-wave (mmWave) bands, and implemented using a 22 nmFDSOI CMOS process. A nested inductor structure is introduced at RF frequencies to reduce silicon footprint, with magnetic crosstalk effects characterized through electromagnetic (EM) simulations using Ansys® RaptorX, Release 2024 R2, ANSYS, Inc. and integrated into the design process. Single-ended LNA architectures are employed for RF bands, while at mmWave frequencies, a differential topology is adopted to enhance linearity and enable simultaneous input and output impedance matching. An EM-based verification flow is applied across all designs to ensure RF/mmWave design flow compatibility, simulation accuracy, and enhanced performance. The proposed designs are evaluated using key metrics including input/output matching, reverse isolation, forward gain, noise figure, linearity (IP1,IP3), stability factor, power consumption, and total chip area to quantify the efficiency of the proposed methodology. The simulation results demonstrate that nested inductors are highly effective for area reduction in RF LNAs, while differential topologies are more suitable for mmWave designs, providing a unified framework for area-efficient and high performance LNA implementation.