Enhancing Energy Efficiency in Networks-on-Chip Through Orca-Inspired Optimization

This research investigates the primary energy consumption challenges in Networks-on-Chip (NoC) systems, which are essential in modern integrated circuits due to their distributed nature across the chip. Effective communication between different clock domains is crucial, necessitating seamless integration of flow control mechanisms with synchronization for data transfer. Although traditional approaches such as Globally Asynchronous Locally Synchronous (GALS) and Dynamic Frequency Scaling (DFS) have achieved notable energy efficiency, they encounter latency issues stemming from inherent delays among clock domains. This work introduces the Orca Cooperative Optimization (OCO) algorithm, which enhances energy management in NoC systems by dynamically optimizing data routing and adjusting frequency and voltage levels based on real-time traffic conditions. Coupled with a multi-level optimization strategy that combines GALS, graph-theoretic principles, and the Traveling Salesperson Problem (TSP), this approach effectively manages power, energy, and data traffic across NoC interconnections. By utilizing graph theory to model the complex geometric structure of the interconnecting network, we enable systematic energy consumption analysis. Evaluating our optimized interface with TSMC CMOS 45nm technology shows that integrating OCO within the multi-level strategy achieves a reduction of 32.4% in dynamic power and 60% in leakage power compared to traditional GALS methods. This significant improvement underscores the potential of the Orca-inspired approach to enhance the energy efficiency of NoC architectures during early design stages.