High-speed/reliability multilevel FeFET memory with atomic-layer-deposited TiO

Atomic-layer-deposited TiO2-/hafnium zirconium oxide (HZO)-based ferroelectric field-effect transistors (FeFETs) have been fabricated for non-volatile memory applications through a single-step post-device annealing process. In this work, the TiO2 layer serves as both the conductive channel and capping layer, promoting the formation of ferroelectric phase in HZO after annealing at ≥ 350 °C. A memory window of 2 V is obtained under optimized annealing temperature of 600 °C, accompanied by a minimum subthreshold swing and a maximum drain current, and the resulting maximum double remanent polarization (2$P_{{r}}$ ) is 25.2 μC/cm2. Further, the TiO2 FeFET memory with a channel length of 80 nm shows fast program/erase speeds (10 ns under 3 V /4.5 V ), yielding a current window over 102. Stable 2-bit retention and endurance exceeding 109 cycles at 85 °C are achieved. These results suggest the TiO2/HZO FeFET memory is promising for low-power embedded non-volatile memory (eNVM) and monolithic three-dimensional (3D) integration applications.