Technique for Sub-mHz Low-Frequency Corner in Capacitively Coupled Instrumentation Amplifiers

This work introduces a tunable technique to push the low-frequency corner (fL) of capacitively coupled instrumentation amplifiers (CCIAs) to the sub-mHz range for emerging biosensing applications. The proposed approach combines Complementary Transimpedance Boosting (CTB) to limit the DC feedback current and segmented duty-cycled resistors (SDR) for tunable resistance. The CTB-SDR technique achieves a stable effective post-layout pseudo-resistance of 535.8 TΩ, equivalent to fL=660 μHz while occupying 0.062 mm2 in a 180 nm process. According to JESD91 standards, it shows a standard deviation of 0.19 mHz under post-layout Monte Carlo + process analysis, 1.1% spread under voltage variations (±5.56% VDD) and 6.2% under temperature variations (−20 °C, 27 °C, and 60 °C). In addition, duty-cycling calibration can compensate for worst-case process corner variations and mismatch-induced feedback instability.

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Publication Details

Journal
Electronics
Published
2025-12-18
DOI
https://doi.org/10.3390/electronics14244963
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
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article

Technique for Sub-mHz Low-Frequency Corner in Capacitively Coupled Instrumentation Amplifiers

Electronics
Analog and Mixed-Signal Circuit Design
article

Technique for Sub-mHz Low-Frequency Corner in Capacitively Coupled Instrumentation Amplifiers

article en

Abstract

This work introduces a tunable technique to push the low-frequency corner (fL) of capacitively coupled instrumentation amplifiers (CCIAs) to the sub-mHz range for emerging biosensing applications. The proposed approach combines Complementary Transimpedance Boosting (CTB) to limit the DC feedback current and segmented duty-cycled resistors (SDR) for tunable resistance. The CTB-SDR technique achieves a stable effective post-layout pseudo-resistance of 535.8 TΩ, equivalent to fL=660 μHz while occupying 0.062 mm2 in a 180 nm process. According to JESD91 standards, it shows a standard deviation of 0.19 mHz under post-layout Monte Carlo + process analysis, 1.1% spread under voltage variations (±5.56% VDD) and 6.2% under temperature variations (−20 °C, 27 °C, and 60 °C). In addition, duty-cycling calibration can compensate for worst-case process corner variations and mismatch-induced feedback instability.

ElectronicsVol. 14(24)
Instituto Tecnológico de Puebla (MX), Universidad Autónoma de Baja California (MX), National Institute of Astrophysics, Optics and Electronics (MX)
Affordable and clean energy
Openalex Percentile: Top 44%
Analog and Mixed-Signal Circuit Design
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