A low-cost and low-latency inter-stage nonlinearity error calibration algorithm for pipelined ADCs
Pipelined analogue-to-digital converters suffer from inter-stage gain errors and inter-stage nonlinearity errors due to gain variations and nonlinearity in residue amplifiers. While a polynomial-based calibration algorithm can address these errors, its conventional implementation demands excessive hardware resources and power consumption. This letter introduces a novel calibration algorithm that combines precomputation with a lookup table, achieving improved hardware efficiency while maintaining calibration accuracy and reducing latency.
Publication Details
- Journal
- TUHH Open Research
- Published
- 2025-11-26
- DOI
- https://doi.org/10.15480/882.16288
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00