A low-cost and low-latency inter-stage nonlinearity error calibration algorithm for pipelined ADCs

Pipelined analogue-to-digital converters suffer from inter-stage gain errors and inter-stage nonlinearity errors due to gain variations and nonlinearity in residue amplifiers. While a polynomial-based calibration algorithm can address these errors, its conventional implementation demands excessive hardware resources and power consumption. This letter introduces a novel calibration algorithm that combines precomputation with a lookup table, achieving improved hardware efficiency while maintaining calibration accuracy and reducing latency.

Publication Details

Journal
TUHH Open Research
Published
2025-11-26
DOI
https://doi.org/10.15480/882.16288
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
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article

A low-cost and low-latency inter-stage nonlinearity error calibration algorithm for pipelined ADCs

TUHH Open Research
Analog and Mixed-Signal Circuit Design
article

A low-cost and low-latency inter-stage nonlinearity error calibration algorithm for pipelined ADCs

article en

Abstract

Pipelined analogue-to-digital converters suffer from inter-stage gain errors and inter-stage nonlinearity errors due to gain variations and nonlinearity in residue amplifiers. While a polynomial-based calibration algorithm can address these errors, its conventional implementation demands excessive hardware resources and power consumption. This letter introduces a novel calibration algorithm that combines precomputation with a lookup table, achieving improved hardware efficiency while maintaining calibration accuracy and reducing latency.

TUHH Open Research
Affordable and clean energy
Openalex Percentile: Top 44%
Analog and Mixed-Signal Circuit Design
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A low-cost and low-latency inter-stage nonlinearity error calibration algorithm for pipelined ADCs · TUHH Open Research (2025) | TGRS Research Map | TGRS