Negative Capacitance Gate-Stack Structure with HfO2 Ferroelectric Layer for Improving Digital Performance of the Field Effect Diodes

In this paper, a negative capacitance gate-stack field effect diode (FED) with reduced subthreshold slope, increased on-state current (ION) and decreased off-state current (IOFF) has been proposed. By using the HfO2 ferroelectric layer following by the SiO2 dielectric layer under the two gates of the device, a negative capacitance structure is created in the gate-stack. Therefore, the gate control over the channel is strengthened which improves the short channel effects and digital performance of the proposed device. Comparing to the conventional FED, the negative capacitance structure in the gate-stack of the proposed FED amplifies the voltage amplification in the channel which causes larger induced carrier concentration for the same applied gate voltages. As the result, smaller IOFF, higher ION, higher ION/IOFF ratio and smaller subthreshold slope are achieved in the proposed FED. In addition, the proposed device exhibits smaller gate capacitance, smaller gate delay time and smaller energy delay product which provide better switching performance with less energy consumption.