Self-sustained boost drive-current level shifter for time critical applications

• It is a Power management IC. • Level Shifters (LSs) ensure reliable voltage translations and signal integrity. • This work proposes a Boost Drive-current Level Shifter (BDLS) that addresses the limitations of conventional LSs in time-critical applications. • Post-layout simulation in 55 nm CMOS process demonstrates that the BDLS supports a wide conversion range from 0.2 V to 1.3 V. • Static power consumption of 3.5 nW, energy dissipation of 32.25 fJ per transition, and delay of 8.56 ns, while occupying only 5.84 µm 2 silicon area. Power management in modern ICs operating at sub-threshold and near-threshold voltage demands both high speed and energy efficiency. Multiple-voltage domains are central to such systems, where Level Shifters (LSs) ensure reliable voltage translations and signal integrity. This work proposes a Boost Drive-current Level Shifter (BDLS) that addresses the limitations of conventional LSs in time-critical applications. To tackle time critical applications, BDLS integrates a symmetrical gate driver inverter for current boosting, enabling balanced rise/fall times, and an inverter-feedback stabilization circuit that mitigates voltage drop and enhances operational reliability. Post-layout simulation in 55 nm CMOS process demonstrates that the BDLS supports a wide conversion range from 0.2 V to 1.3 V, with a static power consumption of 3.5 nW, energy dissipation of 32.25 fJ per transition, and delay of 8.56 ns, while occupying only 5.84 µm 2 silicon area.

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Publication Details

Journal
Results in Engineering
Published
2025-12-12
DOI
https://doi.org/10.1016/j.rineng.2025.108706
Primary Topic
Low-power high-performance VLSI design
Type
article
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article

Self-sustained boost drive-current level shifter for time critical applications

Results in Engineering
Low-power high-performance VLSI design
article

Self-sustained boost drive-current level shifter for time critical applications

article en

Abstract

• It is a Power management IC. • Level Shifters (LSs) ensure reliable voltage translations and signal integrity. • This work proposes a Boost Drive-current Level Shifter (BDLS) that addresses the limitations of conventional LSs in time-critical applications. • Post-layout simulation in 55 nm CMOS process demonstrates that the BDLS supports a wide conversion range from 0.2 V to 1.3 V. • Static power consumption of 3.5 nW, energy dissipation of 32.25 fJ per transition, and delay of 8.56 ns, while occupying only 5.84 µm 2 silicon area. Power management in modern ICs operating at sub-threshold and near-threshold voltage demands both high speed and energy efficiency. Multiple-voltage domains are central to such systems, where Level Shifters (LSs) ensure reliable voltage translations and signal integrity. This work proposes a Boost Drive-current Level Shifter (BDLS) that addresses the limitations of conventional LSs in time-critical applications. To tackle time critical applications, BDLS integrates a symmetrical gate driver inverter for current boosting, enabling balanced rise/fall times, and an inverter-feedback stabilization circuit that mitigates voltage drop and enhances operational reliability. Post-layout simulation in 55 nm CMOS process demonstrates that the BDLS supports a wide conversion range from 0.2 V to 1.3 V, with a static power consumption of 3.5 nW, energy dissipation of 32.25 fJ per transition, and delay of 8.56 ns, while occupying only 5.84 µm 2 silicon area.

Results in EngineeringVol. 29
Electronics Corporation of India (IN), Technical University of Cluj-Napoca (RO), Sri Venkateswara University (IN), G Pulla Reddy Dental College & Hospital (IN), Jawaharlal Nehru Technological University Anantapur (IN)
Affordable and clean energy
Openalex Percentile: Top 44%
Low-power high-performance VLSI design
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Self-sustained boost drive-current level shifter for time critical applications · Results in Engineering (2025) | TGRS Research Map | TGRS