Digitaal Intensieve Communicatiecircuits

CMOS technology is digital oriented. With the scaling of technology nodes, the circuits are becoming faster with reduced power supplies. The decreasing power supplies favor a digital oriented circuit, and increasing speed pushes towards time domain signal processing as the time quantization steps decreases. Thus keeping in view these technological directions, different architectures are being investigated for RF transmitters using time-domain digital circuit. Since they are digital in nature, they can be easily integrated with baseband circuits. Their digital nature also makes them more easy to reconfigure for different standards as compare to the analog counterparts. At the present level of CMOS technology available, the minimum delay (that of a CMOS inverter) is not sufficient to satisfy advanced communication standards. To achieve sub-gate delays different solutions of using varactors and interpolation are also investigated.

Publication Details

Journal
Lirias (KU Leuven)
Published
2025-08-28
Primary Topic
Advancements in PLL and VCO Technologies
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Digitaal Intensieve Communicatiecircuits

Lirias (KU Leuven)
Advancements in PLL and VCO Technologies
article

Digitaal Intensieve Communicatiecircuits

article en

Abstract

CMOS technology is digital oriented. With the scaling of technology nodes, the circuits are becoming faster with reduced power supplies. The decreasing power supplies favor a digital oriented circuit, and increasing speed pushes towards time domain signal processing as the time quantization steps decreases. Thus keeping in view these technological directions, different architectures are being investigated for RF transmitters using time-domain digital circuit. Since they are digital in nature, they can be easily integrated with baseband circuits. Their digital nature also makes them more easy to reconfigure for different standards as compare to the analog counterparts. At the present level of CMOS technology available, the minimum delay (that of a CMOS inverter) is not sufficient to satisfy advanced communication standards. To achieve sub-gate delays different solutions of using varactors and interpolation are also investigated.

Lirias (KU Leuven)
Affordable and clean energy
Openalex Percentile: Top 44%
Advancements in PLL and VCO Technologies
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Digitaal Intensieve Communicatiecircuits · Lirias (KU Leuven) (2025) | TGRS Research Map | TGRS