A theoretical analysis of a Si implanted GaAs MESFET at post anneal condition

A theoretical model of a Si-implanted GaAs MESFET has been developed by considering a Gaussian impurity distribution within the semiconductor channel beneath the gate. The effect of electrical activation of the implanted impurities due to annealing has been incorporated to derive the effective doping distribution and thereby to calculate the drain current and threshold voltage of the device. A general mathematical formulation for the electrical activation of dopants has been proposed for Si implantation in GaAs. The impact of annealing temperature on the device performance has been rigorously studied and corresponding results are reported. It is observed that the drain current and threshold voltage of the device at post anneal condition shows a notable dependence on the activation ratio of the implanted ions. The device current usually improves with activation ratio whereas threshold voltage reduces with it. The maximum drain current and minimum threshold voltage were obtained at an annealing temperature of 800K, where the activation ratio was found to be the highest. The device performance has also been studied with respect to other implantation parameters such as projected range, projected straggle and implantation dose. In addition to the implantation defects, the impact of interface states and interfacial layers at the gate contact have been considered and their impact on device performance has been systematically studied. It is also observed that the drain current and threshold voltage shift by approximately 15.62 mA and 0.935 V, respectively, when interface state density is doubled from 1012 ev−1 cm−2 to 2 × 1012 ev−1 cm−2.

Publication Details

Journal
Springer Link (Chiba Institute of Technology)
Published
2025-11-21
DOI
https://doi.org/10.1051/epjap/2025028/pdf
Primary Topic
Semiconductor materials and interfaces
Type
article
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article

A theoretical analysis of a Si implanted GaAs MESFET at post anneal condition

Springer Link (Chiba Institute of Technology)
Semiconductor materials and interfaces
article

A theoretical analysis of a Si implanted GaAs MESFET at post anneal condition

article en

Abstract

A theoretical model of a Si-implanted GaAs MESFET has been developed by considering a Gaussian impurity distribution within the semiconductor channel beneath the gate. The effect of electrical activation of the implanted impurities due to annealing has been incorporated to derive the effective doping distribution and thereby to calculate the drain current and threshold voltage of the device. A general mathematical formulation for the electrical activation of dopants has been proposed for Si implantation in GaAs. The impact of annealing temperature on the device performance has been rigorously studied and corresponding results are reported. It is observed that the drain current and threshold voltage of the device at post anneal condition shows a notable dependence on the activation ratio of the implanted ions. The device current usually improves with activation ratio whereas threshold voltage reduces with it. The maximum drain current and minimum threshold voltage were obtained at an annealing temperature of 800K, where the activation ratio was found to be the highest. The device performance has also been studied with respect to other implantation parameters such as projected range, projected straggle and implantation dose. In addition to the implantation defects, the impact of interface states and interfacial layers at the gate contact have been considered and their impact on device performance has been systematically studied. It is also observed that the drain current and threshold voltage shift by approximately 15.62 mA and 0.935 V, respectively, when interface state density is doubled from 1012 ev−1 cm−2 to 2 × 1012 ev−1 cm−2.

Springer Link (Chiba Institute of Technology)
Openalex Percentile: Top 37%
Semiconductor materials and interfaces
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A theoretical analysis of a Si implanted GaAs MESFET at post anneal condition · Springer Link (Chiba Institute of Technology) (2025) | TGRS Research Map | TGRS