Modernizing FPGA development using the DESY FPGA firmware framework

Brookhaven National Laboratory (BNL) is currently developing new hardware description language (HDL) code and embedded software for the Electron-Ion Collider (EIC) control system. Part of this effort is modernizing the development process itself, leveraging methodologies and tools that were initially targeted at the software world. These methods include effective source control and project management, modularization and rapid deployment of updated code, automated testing, and in many cases automated code generation. HDL designers additionally face unique challenges compared to software designers, particularly with vendor locking and dependency on particular tools and IP. The FPGA Firmware Framework (FWK), developed by DESY, is a set of tools that helps to both apply these modern methods and to overcome some of those unique challenges. This paper will cover the workflow, successes, and challenges faced when using the FWK. In particular, we will focus on the experience using this workflow to develop a customizable delay generator IP targeting a Zynq FPGA.