Design of an upgraded analog signal digitizer to replace the MADC system at RHIC

A new general-purpose analog signal digitizer has been designed and prototyped to serve as an upgrade to the legacy Multiplexed Analog to Digital Converter (MADC) system currently in use around the RHIC accelerator and injector complex at BNL. The new system is a standalone rackmount chassis with an embedded System on a Chip (SoC). This is a departure from the traditional VME form factor used by most legacy controls equipment within the Collider Accelerator Department. New features include completely independent channels, real time digital signal processing, large sample buffers, built-in timing links, and high bandwidth network connectivity. Support is included for the legacy timing links as well as future compatibility with the EIC Timing Data Link. The core features, system architecture, and scheme for integration with the controls system network is presented.