Radiation-hardened integrated power management circuits for high efficiency pixel detectors in high-energy physics experiments
Silicon detectors are used to detect particles in high-energy physics experiments such as the ATLAS and the CMS experiments. The centerpiece of these experiments is the pixel detector, which consists of sensor units and readout electronics that surround the active beam pipe used for particle detection with high timing and spatial resolution. Since the power supply for the power hungry readout electronics is provided by long cables and the material budget must be kept low, new power supply concepts are discussed in this thesis. The electronics in the innermost layers of these experiments close to the beam pipe, must withstand a high total ionization dose of up to 1 Grad(SiO2) during their lifetime installed in the LHC. Therefore, the electronics are designed in a 65 nm CMOS technology using only core transistor, which has proven to be highly radiation tolerant. The serial powering approach will be installed in the upcoming Phase II upgrade of the ATLAS and CMS experiments at CERN’s LHC. In this approach, detector modules are connected in series and supplied with a constant current. Unlike conventional powering approaches, the current through the long supply lines does not increase with the number of modules, allowing high efficiency with a low material budget. A special regulator concepts consisting of the combination of an LDO regulator and a shunt regulator is used for a local voltage conversion on the frontend ASIC of the detector modules and enables redundancy for a high reliability of the entire serial chain. Overload and overvoltage circuits are integrated into the readout ASICs to ensure safe operation of the voltage regulator. Furthermore, a start-up circuit is implemented and a compensation scheme is introduced to ensure stable operation with high on-chip load capacitance. In addition, the controller can be operated in a low-power mode during installation and maintenance without active cooling. The main focus of this work is the development of a DC/DC converter to implement a conventional parallel powering approach for the innermost detector layers. In contrast to the serial power concept, groups of modules are connected in parallel and the efficiency is increased by reducing the supply current over long cables through a higher module voltage. The DC/DC converter introduces a local step-down conversion to the required voltage level of the readout electronics to be supplied. Therefore, the converter must be able to handle voltages above the supply voltage of the readout electronics to ensure the efficiency improvement. Due to the limited space available inside the inner detectors and the large magnetic field, only air-core inductors with a small volume can be used. The proposed DC/DC converter can be supplied with a voltage of up to 4.8 V and enables a voltage conversion of 4, resulting in an output voltage of 1.2 V. A high switching frequency of 100 MHz ensures the use of passive components with a small volume. The prototype is characterized to verify reliability and radiation tolerance is confirmed by X-ray tests.
Publication Details
- Journal
- Universitätsbibliographie, Universität Duisburg-Essen
- Published
- 2025-12-02
- DOI
- https://doi.org/10.17185/duepublico/84661
- Primary Topic
- Particle Detector Development and Performance
- Type
- article
- Field-Weighted Citation Impact
- 0.00