OPTIMIZED DESIGN OF ULTRA-FAST PIPELINE FIR FILTERS THROUGH CRITICAL PATH EVALUATION AND ENHANCEMENT

In digital signal processing, a FIR (finite impulse response) is a filter whose impulse response is of finite duration, and, thus, settles to zero in a finite amount of time. This is often compared to IIR filters, which potentially can respond infinitely, even with internal feedback. In this paper, a new hardware design of a high-speed FIR filter using fine-grained seamless pipelining technique is proposed. The proposed fullparallel pipeline FIR filter can give an output sample in a few gate delays by placing the pipeline registers across and in between the components. Specific pipelining strategies may then be devised at the level of the critical path analysis at the gate level depending on the throughput requirement. This project has two other designs in addition, allowing a different throughput rate and a corresponding area. The recommended FIR filters are designed for maximum throughput in trade-off between speed vs complexity. A model is used for sim software and xilinx for actual implementation

Publication Details

Journal
Zenodo (CERN European Organization for Nuclear Research)
Published
2025-12-02
DOI
https://doi.org/10.5281/zenodo.17786723
Primary Topic
Digital Filter Design and Implementation
Type
article
Field-Weighted Citation Impact
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article

OPTIMIZED DESIGN OF ULTRA-FAST PIPELINE FIR FILTERS THROUGH CRITICAL PATH EVALUATION AND ENHANCEMENT

Zenodo (CERN European Organization for Nuclear Research)
Digital Filter Design and Implementation
article

OPTIMIZED DESIGN OF ULTRA-FAST PIPELINE FIR FILTERS THROUGH CRITICAL PATH EVALUATION AND ENHANCEMENT

article en

Abstract

In digital signal processing, a FIR (finite impulse response) is a filter whose impulse response is of finite duration, and, thus, settles to zero in a finite amount of time. This is often compared to IIR filters, which potentially can respond infinitely, even with internal feedback. In this paper, a new hardware design of a high-speed FIR filter using fine-grained seamless pipelining technique is proposed. The proposed fullparallel pipeline FIR filter can give an output sample in a few gate delays by placing the pipeline registers across and in between the components. Specific pipelining strategies may then be devised at the level of the critical path analysis at the gate level depending on the throughput requirement. This project has two other designs in addition, allowing a different throughput rate and a corresponding area. The recommended FIR filters are designed for maximum throughput in trade-off between speed vs complexity. A model is used for sim software and xilinx for actual implementation

Zenodo (CERN European Organization for Nuclear Research)
Openalex Percentile: Top 39%
Digital Filter Design and Implementation
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