Research on <scp>SIMD</scp> Instruction Sequence Generation Method for Vector <scp>DSP</scp> Processor

ABSTRACT In the field of digital signal processing (DSP), the execution of vector operations depends on the optimization of Single Instruction Multiple Data (SIMD) technology. However, manual SIMD vectorization method is complex to develop, poorly portable, and costly to maintain. Therefore, we propose a method of SIMD instruction sequence generation based on LLVM. This method builds a hierarchical instruction generation framework, combines the characteristics of the target architecture, and uses LLVM automatic vectorization tool to gradually convert the vectorized intermediate representation into the target architecture instruction sequence containing SIMD instructions. Experiments on FT‐M7002 hardware platform show that, compared with the vectorization method of manually calling SIMD built‐in functions, the average execution performance of the instruction sequence generated by this method can be improved by up to 70%.