HeLEx: A Heterogeneous Layout Explorer for Spatial Elastic Coarse-Grained Reconfigurable Arrays

We present HeLEx, a framework for determining the functional layout of heterogeneous spatially-configured elastic Coarse-Grained Reconfigurable Arrays (CGRAs). Given a collection of input data flow graphs (DFGs) and a target CGRA, the framework starts with a full layout in which every processing element (PE) supports every operation in the DFGs. It then employs a branch-and-bound (BB) search to eliminate operations out of PEs, ensuring that the input DFGs successfully map onto the resulting CGRAs, eventually returning an optimized heterogeneous CGRA. Experimental evaluation with 12 DFGs and 9 target CGRA sizes reveals that the framework reduces the number of operations by over 68.7% on average, resulting in a reduction of CGRA area by about 70% and of power by about 27%, all compared to the initial full layout. HeLEx generates CGRAs that are on average only within 4.9% of theoretically minimum CGRAs that support exactly the number of operations needed by the input DFGs. A comparison with functional layouts produced by two state-of-the-art frameworks indicates that HeLEx achieves better reduction in the number of operations, by up to 2.6X.

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Publication Details

Journal
ACM Transactions on Architecture and Code Optimization
Published
2026-08-20
DOI
https://doi.org/10.1145/3842386
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
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article

HeLEx: A Heterogeneous Layout Explorer for Spatial Elastic Coarse-Grained Reconfigurable Arrays

ACM Transactions on Architecture and Code Optimization
Embedded Systems Design Techniques
article

HeLEx: A Heterogeneous Layout Explorer for Spatial Elastic Coarse-Grained Reconfigurable Arrays

article en

Abstract

We present HeLEx, a framework for determining the functional layout of heterogeneous spatially-configured elastic Coarse-Grained Reconfigurable Arrays (CGRAs). Given a collection of input data flow graphs (DFGs) and a target CGRA, the framework starts with a full layout in which every processing element (PE) supports every operation in the DFGs. It then employs a branch-and-bound (BB) search to eliminate operations out of PEs, ensuring that the input DFGs successfully map onto the resulting CGRAs, eventually returning an optimized heterogeneous CGRA. Experimental evaluation with 12 DFGs and 9 target CGRA sizes reveals that the framework reduces the number of operations by over 68.7% on average, resulting in a reduction of CGRA area by about 70% and of power by about 27%, all compared to the initial full layout. HeLEx generates CGRAs that are on average only within 4.9% of theoretically minimum CGRAs that support exactly the number of operations needed by the input DFGs. A comparison with functional layouts produced by two state-of-the-art frameworks indicates that HeLEx achieves better reduction in the number of operations, by up to 2.6X.

ACM Transactions on Architecture and Code Optimization
University of Toronto (CA)
Openalex Percentile: Top 99%
Embedded Systems Design Techniques
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HeLEx: A Heterogeneous Layout Explorer for Spatial Elastic Coarse-Grained Reconfigurable Arrays · ACM Transactions on Architecture and Code Optimization (2026) | TGRS Research Map | TGRS