Hardware-in-the-loop real-time simulation of an active bypass SOC/Voltage balancing topology with ultrafast charging and comparative power loss analysis

Cell balancing is a crucial part of the battery management system to optimise the charging process of the electric vehicle battery pack. Recently, Electric vehicles have been using ultra-fast charging that can initially charge the battery at a 2C rate. However, basic SOC/voltage balancing topologies cannot provide SOC/voltage balance during this charging time. This paper presents the modular bypass balancing technique, which can balance the SOC/voltage during ultra-fast charging. The voltage-based controller is designed to eliminate the need for accurate SOC estimation. The proposed topology uses MOSFETS as a switching device to connect or disconnect the module according to the voltage measurement and control algorithm. The constant current constant voltage (CCCV) charge controller is designed, as the bypass topology requires an adaptive control to adjust the charger supply voltage according to the number of bypass modules. The results prove that the CC to CV mode is switched when the battery SOC reaches 85 %. To check the performance and stability of the proposed topology, it has been tested with dynamic initial SOC conditions and charging rates (0.5C and 1C). The hardware in the loop setup is adopted to verify the reliability and feasibility of the proposed topology and controller design. The experimental results showed that the proposed topology successfully achieved SOC/voltage balancing by reducing the SOC difference to 0 % while the voltage difference is reduced from 2 V to 250 mV. The results also verified that the proposed topology gives a shorter balancing time as compared with the other methods. The balancing time is compared according to the initial SOC imbalance and the balancing current. It shows that the proposed method can provide SOC/Voltage balancing in 30 min while using 2C rate charging and 80 % initial imbalance. Since the power loss is directly proportional to the charging current thus the compression is performed under 2C rate charging. The proposed topology produces a power loss of 12.5 W, while other topologies produce 12.85 W to 51.41 W, considering the number of switching devices used in each method. • An optimal controller design based on voltage measurement without the need for SOC estimation. • An adaptive controller design to adjust the charger voltage according to the battery variable voltage. • SOC/voltage balancing to achieve nearly zero imbalance during ultrafast charging at a 2C rate.