Large‐scale silicon photonics switches for AI/ML interconnections based on a 300‐mm CMOS pilot line

Silicon photonics switches are emerging as a key technology for realizing energy-efficient networks, spanning from intra data center to wafer-scale interconnections. This review focuses on recent developments and prospects of silicon photonics switches operating in the O-band, which is widely used in computing networks designed for artificial intelligence and machine learning applications. We first review our recent works on O-band silicon photonics switches fabricated by 300-mm silicon photonics technology. Specifically, we have expanded the port count of our O-band switches from 8 × 8 to 32 × 32 implemented with double Mach-Zehnder switch elements for a broad operating bandwidth. This switch achieved a 70-nm bandwidth for a crosstalk of less than -20 dB, and an average on-chip loss of 11.8 dB. Next, we discuss switch topologies optimized for wafer-scale interconnection. Conventional switch topologies typically have their input and output ports at opposite ends of the switch matrix, respectively, which poses challenges of long propagation distances and many waveguide intersections for off-chip planar waveguide routing to connect xPUs on substrate. To address this, we propose a topology where input and output ports are placed adjacently. An O-band 8 × 8 switch based on this topology was fabricated and experimentally demonstrated. Finally, we discuss the prospects and challenges of silicon photonic switches. Key issues include insertion loss, switching speed, crosstalk and operating bandwidth, and polarization dependence. These aspects are examined with reference to reports from other research groups, highlighting both current limitations and potential directions for further improvement.