FPGA Support For Security Against Invasive Attacks

Field Programmable Gate Arrays (FPGA) are becoming more widely used in distributed systems and in cloud computing. These FPGAs are all composed of common elements: configurable logic elements in the form of look-up tables (LUTs) and routing between the LUTs. A design is loaded into the FPGA as a bitstream, which programs the logic elements and the connections in between. This bitstream is a frequent target of attackers because an attacker that can access the unprotected bitstream has access to the entire configuration of the FPGA. In order to secure the design against common attackers, many FPGAs support bitstream encryption, in which a bitstream is encrypted by the designer and decrypted on the FPGA before being used to configure the individual elements within the FPGA. Encrypting the bitstream conceals the data transmitted to the FPGA so that an attacker listening will not learn anything without the key. However, a skilled attacker capable of probing the FPGA internally can still access the details of the design by invasively probing the wires of the FPGA after the configurations are decrypted. This attack bypasses bitstream encryption. Recent works have demonstrated that such probing is both practical and realistic, making it a significant threat to FPGA security. When we consider this form of invasive probing, we can not assume that any signals within the chip are secure and new protections are needed. We describe a proposed design to mitigate the possibility of attacking the bitstream. In particular, our design protects against invasive probing of on-chip wires by ensuring that the decrypted bitstream is never communicated in the clear over a small number of wires known to the attacker. The primary element we present is a shell that distributes the bitstream through many wires suitable for the use with physically unclonable functions (PUFs) to create security on the hardware. To evaluate our design, we develop a metric to model susceptibility to an invasive probing attack. Then, we determine the factor to which our design defends against such an attack as well as the extra resource utilization to achieve that defense. Using this approach, we implemented several small designs to demonstrate its effectiveness.